MPC5xxx中的主题 MPC5746R I/O initial

MPC5746R I/O initial

BoxLi — Mon, 09 Oct 2017 06:45:15 GMT

Hi:

I found there are 2 kinds of input can be configured for MPC5746R PJ[14]: DSPI0 clock input and error input for FCCU. Please see attachment. But i can't find how to distinguish them. Can you help check which register can be set to enable/disable each module? Thanks.

Re: MPC5746R I/O initial

petervlna — Mon, 09 Oct 2017 11:33:56 GMT

Hi,

They are both connected on input of PJ[14].

Peter

Re: MPC5746R I/O initial

BoxLi — Tue, 10 Oct 2017 01:06:03 GMT

Peter Vlna wrote:
Hi,
They are both connected on input of PJ[14].
Peter

Hi Peter:

Do you mean that the input signal of PJ[14] connect to DSPI and FCCU module simultaneous(seting PAD158 input)? Thanks.

Re: MPC5746R I/O initial

petervlna — Tue, 10 Oct 2017 07:52:18 GMT

yes,

This is what I expect.

However there can be conflict which I am right now discussing with design.

In scenario where you have PJ[14] selected as input and SPI clock is as input on this pin the FCCU NCF[60] will be set.

On other device (MPC5748G) there is separated IMCR for FCCU[ERRIN] and DSPI. So user can select the input functionality. However here is not this possibility according to IO table.

I will update you when design say they statement.

Peter

Re: MPC5746R I/O initial

BoxLi — Mon, 16 Oct 2017 03:59:15 GMT

Hi Peter:

Any update on this issue? Thanks.

Re: MPC5746R I/O initial

petervlna — Mon, 16 Oct 2017 13:13:03 GMT

Hi,

No, still no answer from application/design team.

Peter

Re: MPC5746R I/O initial

petervlna — Thu, 30 Nov 2017 12:26:46 GMT

Hi,

This issue is clear now.

The DSPI CLKIN and FCCU ERRIN are both rooted as input without possibility to select or disable one of them.

Therefore when DPSI clock input is on pin PJ[14] user must disable FCCU NCF[60] in FCCU_NCF_E1 register.

However this will still rise fault NCF[60] in FCCU_NCF_S1.

If the user SW validate NCF then NCF[60] must be ignored as it is caused by dual input rooting on PJ[14].

User must select either to have DSPI clk in or FCCU ERRIN functionality on this pin.

Peter