topic Re: MPC5777C CAN Rx and TX in MPC5xxx

MPC5777C CAN Rx and TX

vrushalitaklika — Mon, 31 Jul 2017 10:14:50 GMT

Hello,

I am working on simple tx and rx function of CAN controller of MPC5777C.

I am referring example

Example-MPC5777C-FlexCAN-simpleTXRX-ECCdisabled-GHS616

But I dont see interrupt flag getting set and transmit and receive is initiated.

While debugging my program hangs at below code line

In transmit function

while ( CAN_A.IFLAG1.B.BUF31TO8I == 0) { } // wait until the tx is completed.
CAN_A.IFLAG1.R = 0x00000100;

In receive.

if(CAN_B.IFLAG1.B.BUF31TO8I) // test BUF9I flag if set
{
ReceiveMsg();

Please suggest what is missing.

Thanks

Vrushali

Re: MPC5777C CAN Rx and TX

PetrS — Tue, 01 Aug 2017 05:14:04 GMT

Hi Vrushali,

Do you use the MPC5777C EVB or some own design?

For the first one, did you do the exact EVB connection as it is mentioned in the example?

If you have own design, what is your connection between modules? What is the transceiver used?

In case of any failure you can always do several things.

- check the ECR and ECS registers to see what error happen

- measure the signal on the CAN bus, is this normal?

- you can disconnect transceiver and connect TX/RX pin together, this way you can test CANmodule and pin init and you should be able to see message transmitted still, it is not ACKed.

BR, Petr

Re: MPC5777C CAN Rx and TX

vrushalitaklika — Tue, 01 Aug 2017 10:26:25 GMT

Thanks Petr, problem is resolved.

I have one more query. I have implemented id filtering in my CAN controller and want to filter below ids. Here is my can initialisation

void initCAN_A()
{
uint32_t i = 0;

/* enable the FlexCAN module, reset and freeze */
CAN_A.MCR.R = (0 | CAN_MCR_FRZ | CAN_MCR_FEN | CAN_MCR_HALT | CAN_MCR_SOFTRST | CAN_MCR_SRXDIS | CAN_MCR_BCC
| CAN_MCR_IDAM_00 | 0x0000003F);

/* wait until soft reset completes */
while(1 == CAN_A.MCR.B.SOFTRST) {};

/* double check that we are actually in freeze mode */
while(0 == CAN_A.MCR.B.FRZACK) {};
while(0 == CAN_A.MCR.B.NOTRDY) {};

CAN_A.CTRL1.R = 0x04E40004; /* CAN bus: 40 MHz clksrc, 500K bps with 16 tq */
CAN_A.CTRL2.B.ECRWRE = 1; // enable editing of MECR
CAN_A.MECR.B.ECRWRDIS = 0; // enable writes to MECR
CAN_A.MECR.R = 0x00000100; // disable ECC error ISR and disable ECC at all , keep normal operation
CAN_A.CTRL2.B.ECRWRE = 0; // lock the MECR again
CAN_A.CTRL2.B.RFFN =0x1;

for(i=8;i<64;i++)
{
CAN_A.MB[i].CS.R = 0;
}
ID_Table0_CANA = 0x0000A000;
ID_Table1_CANA = 0x0000A200; /* */
ID_Table2_CANA = 0x0000B000; /* */
ID_Table3_CANA = 0x0000B500; /* */
ID_Table4_CANA = 0x0000B900; /* */
ID_Table5_CANA = 0x0000BA00; /* */
ID_Table6_CANA = 0x0000BB00; /* */
ID_Table7_CANA = 0x0000C000; /* */
ID_Table8_CANA = 0x0000C100;

/* set mask registers - all ID bits must match */
for(i=0;i<64;i++)
{
CAN_A.RXIMR[i].R = 0xFFFFFFF;
}

//CAN_A.RXIMR[0].R =0x1FFFFFF0;
CAN_A.IMASK1.R = 0x00000020;
CAN_A.RXFGMASK.R = 0x1FFFFFFF;
CAN_A.RX14MASK.R = 0x1FFFFFFF;
CAN_A.RX15MASK.R = 0x1FFFFFFF;
/* configure CNTX_A and CNRX_A pin functions on PCR83 and PCR84 */
SIU.PCR[83].R = 0x060C; /* CNTXA, push/pull, max slew rate */
SIU.PCR[84].R = 0x0503; /* CNRXA, weak pull device disabled */

CAN_A.MCR.B.HALT = 0;
CAN_A.MCR.B.FRZ =0;
/* wait until FlexCAN ready */
while(1 == CAN_A.MCR.B.FRZACK) {}
while(1 == CAN_A.MCR.B.NOTRDY) {}
}

Can you please confirm if RX mask registers values are correct.

Here interrupt is raised only for B100 id. however I haven't configured B100 id in my id table.

Here is my main

int main(void)
{
...
initCAN_A();

/* Loop forever */
if(CAN_A.IFLAG1.B.BUF5I) // test BUF9I flag if set
{
ReceiveMsg();
CAN_A.IFLAG1.R = 0x00000020;

}

Can you please guide here.

Thanks

vrushali

Re: MPC5777C CAN Rx and TX

PetrS — Tue, 01 Aug 2017 10:59:06 GMT

when RFFN =1 is used then 16 RXFIFO filters are active occupying MB6-MB9 area. Regular MBs starts from MB10.

As you initialize just CS word starting from MB8, some RXFIFO filters are "undefined", maybe some of them are set to hit 0xB100 ID.

Or you incorrectly use the regular MBs, note for RFFN=1 it starts from MB10.

Also note the bits in ID table and the mask registers are shifted left by 1 bit for IDAM=0.

BR, Petr

Re: MPC5777C CAN Rx and TX

vrushalitaklika — Wed, 02 Aug 2017 11:46:02 GMT

Hi Petr,

Its still not clear how does masking resgiters work here

I have set IRMQ=1; FEN =1, RFFN =0;

When does below registers come into picture

RXIMR

RXFGMASK

RXMGMASK

RX14MASK

RX15MASK

And how is the masking operation takes place when user enters any specific id example A000.

If you have any documentation with example , please provide.

Thanks

Vrushali