topic Re: MPC5777C eDMA performance in MPC5xxx

MPC5777C eDMA performance

mikaeldeschamps — Tue, 04 Jul 2017 12:39:59 GMT

Hello,

within the MPC5777C Reference Manual, considering sections §16.5.1 "eDMA basic data flow" and §16.5.4 "Performance", many points remain unclear to me:

- which path is used to load a new TCD during a scatter/gather operation ?

- which performances can be expected in this mode ?

Thank tou in advance

Re: MPC5777C eDMA performance

davidtosenovjan — Tue, 04 Jul 2017 14:28:10 GMT

Hi, eDMA uses Dual-Address Transfers only what means transferred data are being read from source address to DMA engine first, followed by write from DMA to destination address. In case eDMA is configured for scatter-gather and DMA engine reads new transfer control descriptor, it just additional transfer between memory and DMA.

If you count overall amount of transferred data and you want to use scatter-gather, just add 32-byte for transfer control descriptor.

Re: MPC5777C eDMA performance

mikaeldeschamps — Tue, 04 Jul 2017 15:14:30 GMT

Hi, thank you for your help.

But considering the figure 16-1065 and following of "MPC5777C Reference Manual, Rev. 4, 07/2015", does it mean that an arrow is missing between the "Data path" block and the TCD ?

And as the TCD image to be loaded in the eDMA local memory comes, most of the time from the SRAM or from the flash memory, does the figures of table 16-1068. "eDMA peak transfer rates (Mbytes/sec)", column "Internal SRAM-to-32 bit
internal peripheral bus" apply ?

Thank you in advance