topic Can Flash Write operation effect DMA? in MPC5xxx

Can Flash Write operation effect DMA?

liujinhang — Thu, 11 May 2017 11:09:08 GMT

hi,

i have a new question about DMA function. today when i debug my program ,i found that when i doing EEPROM write operation on the frequency of very fast, my DMA will delay max to 3us. i can not explain this strange phenomenon to my colleague. so i want to know, can Flash Write operation effect DMA and how effect the DMA?

PS: i used the EEE_Driver_v1.2.0 to realize the EEPROM function by using flash.

Re: Can Flash Write operation effect DMA?

petervlna — Thu, 11 May 2017 12:34:21 GMT

Hello,

Yes, it can.

Unfortunately you didn't specified the device you are using. So its hard to tell the root cause.

Have in mind that there is a XBAR which arbitrate accesses for masters to slaves.

Foe example if you are accessing to flash via core, and in same time DMA want to access flash. Master with lower XBAR priority must wait until slave is released from master of higher priority.

Peter

Re: Can Flash Write operation effect DMA?

liujinhang — Fri, 12 May 2017 01:02:13 GMT

Thank you for your response.

i used 5744P. i also want to know the flash writing operation how effect the DMA. and i want to know how long the max time will course DMA delaying.

please help me, thank you very much.

your said that DMA will wait for other higher priority accessing operation, i very think so. but i feel strange that the DMA will actually be delayed for 3us, this make me misdoubt my DMA function.

Re: Can Flash Write operation effect DMA?

liujinhang — Fri, 12 May 2017 01:37:40 GMT

another important information is that i did not configure the XBAR, so the xbar function runs on its default configuration.

Re: Can Flash Write operation effect DMA?

liujinhang — Mon, 15 May 2017 06:04:01 GMT

is there any document to specify which operation would effect the DMA operation?

Re: Can Flash Write operation effect DMA?

petervlna — Mon, 15 May 2017 13:47:51 GMT

Hi,

The default priorities are: (where 0 is highest)

M0 -> 0

M1 -> 1

M5 -> 2

M6 -> 3

So if your core is accessing slave and in the same time DMA want to access it it must wait until higher priority master release accessed slave. There is no time limit.

Usual application configuration where no large data block are transmit over DMA or FlexRAY is:

1. Flexray (highest)

2. DMA

3. Core

But this is really application specific.

If you want to test if your DMA transfer is delayed because of XBAR priority, just change it and give DMA higher priority.

If this does not help there must be another reason for the delay.

Peter

Re: Can Flash Write operation effect DMA?

liujinhang — Tue, 16 May 2017 05:23:59 GMT

Thank you very much. i will do some test and then tell you.

Re: Can Flash Write operation effect DMA?

liujinhang — Tue, 16 May 2017 06:38:35 GMT

Hi Peter,

thank you very much! i did the test by setting the DMA highest priority to access all slave ports. and the problem

disappears.

thank you!