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    <title>topic Re: MPC5748G STM in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-STM/m-p/658180#M7142</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Peter,&lt;/P&gt;&lt;P&gt;Thank you very much for your support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 12 Apr 2017 14:26:42 GMT</pubDate>
    <dc:creator>yankuang1</dc:creator>
    <dc:date>2017-04-12T14:26:42Z</dc:date>
    <item>
      <title>MPC5748G STM</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-STM/m-p/658178#M7140</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I encountered the following two problems when testing the System Timer Module,the test code is shown in the figure.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/18496i8B4F53D742EFBDE6/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/18553i51762BA5E6CEC236/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;1.After each interrupt is generated, the CNT register must be configured in addition to clearing the CLR register.If the CNT register is not reconfigured, the next interrupt will not be generated.Is this the correct way to operate SMT?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.I&amp;nbsp;found that the timers generated by SMT were not accurate.For example, I configured the timer to 1000 milliseconds,after executing an interrupt function,&amp;nbsp;the next timer time becomes 1030 milliseconds.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Apr 2017 08:59:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5748G-STM/m-p/658178#M7140</guid>
      <dc:creator>yankuang1</dc:creator>
      <dc:date>2017-04-07T08:59:00Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5748G STM</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-STM/m-p/658179#M7141</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;1. Yes&lt;/P&gt;&lt;P&gt;2. You are not using it in correct way.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;After STM reach compare value, triggers an interrupt. You have to configure compare register. Just increase its value by value when you want next interrupt occur. On background of this interrupt routine counter is still running.&lt;/P&gt;&lt;P&gt;When counter reach this increased compare value you will get another interrupt. Just in accurate time.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Apr 2017 09:25:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5748G-STM/m-p/658179#M7141</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2017-04-07T09:25:08Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5748G STM</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-STM/m-p/658180#M7142</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Peter,&lt;/P&gt;&lt;P&gt;Thank you very much for your support&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Apr 2017 14:26:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5748G-STM/m-p/658180#M7142</guid>
      <dc:creator>yankuang1</dc:creator>
      <dc:date>2017-04-12T14:26:42Z</dc:date>
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