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    <title>topic Re: MPC5777C EQADC configuration in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647048#M6607</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks David.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I implemented same way.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However my requirement is, I have to use&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;22 channels of EQADCA and 7 channels of EQADC B&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How do I modular the code so that for every channel configuration same function is called always.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also need clarification when to use CFPR[0] and CFPR[1] &amp;nbsp;etc and likewise CFCR0 and CRFR1 registers etc.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is my&amp;nbsp;init and send and receive functions.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;void eqadc_init (struct EQADC_tag *my_eqadc)&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;{&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; /* CBuffer0 */&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;my_eqadc-&amp;gt;CFPR[0].R = B0 | MESSAGE_TAG(NULL_M) | LST(CYCLES_2) | CHANNEL(4);&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;CFPR[0].R = EOQ | B1 | MESSAGE_TAG(NULL_M) | LST(CYCLES_2) | CHANNEL(4);&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;/*Trigger CFIFO 0 using Single Scan SW mode */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;CFCR0.R= SINGLE_SCAN_ENABLE | MODEx(SOFTWARE_TRIGGER_SINGLE_SCAN);&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;/*Wait for End Of Queue flag*/&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; while(my_eqadc-&amp;gt;FISR[0].B.EOQFX != 1) {}&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;FISR[0].R = End_of_Queue_Flag;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;STRONG&gt;}&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;void SendConvCmd(struct EQADC_tag *my_eqadc, int channelnum)&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;{&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; /* Conversion command: convert channel 5 */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; /* with ADC0, set EOQ */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;CFPR[0].R = EOQ | channelnum&amp;lt;&amp;lt;8;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;}&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;void ReadResult(struct EQADC_tag *my_eqadc, int *Result)&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;{&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; while(my_eqadc-&amp;gt;FISR[0].B.RFDFX != 1){}; /* Wait for RFIFO 0's Drain Flag to set */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; Result = my_eqadc-&amp;gt;RFPR[0].R; /* ADC result */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; //ResultInMv = (vuint32_t)((5000*Result)/0x3FFC);&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;FISR[0].R = RFIFO_Drain_Flag; /* Clear RFIFO 0's Drain Flag */&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;}&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;From main function I am calling it as below&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;eqadc_init(&amp;amp;EQADC_A);&lt;BR /&gt; eqadc_init(&amp;amp;EQADC_B);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; SendConvCmd(&amp;amp;EQADC_A, 4); // here 4 corresponds to channel no&amp;nbsp;4&lt;BR /&gt; ReadResult(&amp;amp;EQADC_A, &amp;amp;duty);&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 23 May 2017 09:09:19 GMT</pubDate>
    <dc:creator>vrushalitaklika</dc:creator>
    <dc:date>2017-05-23T09:09:19Z</dc:date>
    <item>
      <title>MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647043#M6602</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I am trying to initalise EQADC0 in MPC5777C controller.&lt;/P&gt;&lt;P&gt;How do I configure EQADC.CFPR register with below configuration&lt;/P&gt;&lt;P&gt;/* Send CFIFO 0 a ADC0 configuration command */&lt;BR /&gt; /* enable ADC0 &amp;amp; sets prescaler= divide by 10 */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the datasheet EQADC.CFPR register does not have register bitwise e4xplanation.&lt;/P&gt;&lt;P&gt;Can someone help on configuraing CFPR register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Vrushali&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Apr 2017 05:04:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647043#M6602</guid>
      <dc:creator>vrushalitaklika</dc:creator>
      <dc:date>2017-04-27T05:04:17Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647044#M6603</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It is register for writing commands to CFIFO either due to conversion command in standard or alternate configuration or for indirect access to On-Chip ADC registers.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/15132iCD5D5521776E1DD8/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I could recommend you to see following example codes:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-105723"&gt;Example MPC5674F eQADC+eDMA Single_Scan CW210&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-105724"&gt;Example MPC5674F eQADC+eDMA Continuous_Scan CW210&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-101791"&gt;Example MPC5644A eQADC channel 146 conversion+calibration CW210&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also I am attaching header file that could be possibly useful for you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Apr 2017 12:23:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647044#M6603</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2017-04-27T12:23:22Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647045#M6604</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks David&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 May 2017 05:53:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647045#M6604</guid>
      <dc:creator>vrushalitaklika</dc:creator>
      <dc:date>2017-05-08T05:53:44Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647046#M6605</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi David, do you have a C file where you have used this eqadc_mamcros_Mamba.h file&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Vrushali&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 May 2017 06:17:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647046#M6605</guid>
      <dc:creator>vrushalitaklika</dc:creator>
      <dc:date>2017-05-23T06:17:08Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647047#M6606</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have used it in this example:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-106199"&gt;Example MPC5674F eQADC-Streaming Mode CW210&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 May 2017 08:04:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647047#M6606</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2017-05-23T08:04:21Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647048#M6607</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks David.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I implemented same way.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However my requirement is, I have to use&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;22 channels of EQADCA and 7 channels of EQADC B&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How do I modular the code so that for every channel configuration same function is called always.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Also need clarification when to use CFPR[0] and CFPR[1] &amp;nbsp;etc and likewise CFCR0 and CRFR1 registers etc.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is my&amp;nbsp;init and send and receive functions.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;void eqadc_init (struct EQADC_tag *my_eqadc)&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;{&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; /* CBuffer0 */&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;my_eqadc-&amp;gt;CFPR[0].R = B0 | MESSAGE_TAG(NULL_M) | LST(CYCLES_2) | CHANNEL(4);&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;CFPR[0].R = EOQ | B1 | MESSAGE_TAG(NULL_M) | LST(CYCLES_2) | CHANNEL(4);&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;/*Trigger CFIFO 0 using Single Scan SW mode */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;CFCR0.R= SINGLE_SCAN_ENABLE | MODEx(SOFTWARE_TRIGGER_SINGLE_SCAN);&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;/*Wait for End Of Queue flag*/&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; while(my_eqadc-&amp;gt;FISR[0].B.EOQFX != 1) {}&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;FISR[0].R = End_of_Queue_Flag;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;STRONG&gt;}&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;void SendConvCmd(struct EQADC_tag *my_eqadc, int channelnum)&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;{&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; /* Conversion command: convert channel 5 */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; /* with ADC0, set EOQ */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;CFPR[0].R = EOQ | channelnum&amp;lt;&amp;lt;8;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;}&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;void ReadResult(struct EQADC_tag *my_eqadc, int *Result)&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;{&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; while(my_eqadc-&amp;gt;FISR[0].B.RFDFX != 1){}; /* Wait for RFIFO 0's Drain Flag to set */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; Result = my_eqadc-&amp;gt;RFPR[0].R; /* ADC result */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; //ResultInMv = (vuint32_t)((5000*Result)/0x3FFC);&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt; my_eqadc-&amp;gt;FISR[0].R = RFIFO_Drain_Flag; /* Clear RFIFO 0's Drain Flag */&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;}&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;From main function I am calling it as below&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;eqadc_init(&amp;amp;EQADC_A);&lt;BR /&gt; eqadc_init(&amp;amp;EQADC_B);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; SendConvCmd(&amp;amp;EQADC_A, 4); // here 4 corresponds to channel no&amp;nbsp;4&lt;BR /&gt; ReadResult(&amp;amp;EQADC_A, &amp;amp;duty);&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 23 May 2017 09:09:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647048#M6607</guid>
      <dc:creator>vrushalitaklika</dc:creator>
      <dc:date>2017-05-23T09:09:19Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647049#M6608</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a confusion on using CFPR and RFPR register.&lt;/P&gt;&lt;P&gt;How to decide when to use CFPR[0] CFPR[1] CFPR[2]... and same for RFPR[0]. RFPR[1].&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is my implementation is this correct&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;EQADC_A.CFPR[0].R = 0x00000000 | (ANA12_TO_ADC_IA1&amp;lt;&amp;lt;8) ;&lt;BR /&gt; EQADC_A.CFPR[0].R = 0x00100000 | (ANA21_TO_ADC_DCLINK1_LK&amp;lt;&amp;lt;8) ;&lt;BR /&gt; EQADC_A.CFPR[0].R = 0x80200000 | (ANA6_TO_ADC_DCLINK1_V&amp;lt;&amp;lt;8) ;&lt;BR /&gt; EQADC_A.CFPR[1].R = 0x00000000 | (ANA34_TO_ADC_INV1_TA &amp;lt;&amp;lt;8) | (1 &amp;lt;&amp;lt; 24); //1 is calibration value&lt;BR /&gt; EQADC_A.CFPR[1].R = 0x00100000 | (ANA35_TO_ADC_INV1_TB &amp;lt;&amp;lt;8) | (1 &amp;lt;&amp;lt; 24); //1 is calibration value&lt;BR /&gt; EQADC_A.CFPR[1].R = 0x00200000 | (ANA36_TO_ADC_INV1_TD &amp;lt;&amp;lt;8) | (1 &amp;lt;&amp;lt; 24); //1 is calibration value&lt;BR /&gt; EQADC_A.CFPR[1].R = 0x80300000 | (ANA37_TO_ADC_INV1_TC &amp;lt;&amp;lt;8) | (1 &amp;lt;&amp;lt; 24); //1 is calibration value&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Vrushali&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Jun 2017 11:56:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647049#M6608</guid>
      <dc:creator>vrushalitaklika</dc:creator>
      <dc:date>2017-06-19T11:56:00Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647050#M6609</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;CFPRx/RFPRx chooses particular Command/Result FIFO number. Lower FIFO number has higher priority when priority processing is necessary.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/23028i55531E85F69466D6/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Choosing of FIFO is completely up to you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 19 Jun 2017 12:22:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647050#M6609</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2017-06-19T12:22:52Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647051#M6610</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks David.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have 10 analog channels to convert, and we have 6 RFIFO, can you suggest how can we convert all 10 channels in one function itself.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 20 Jun 2017 05:16:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647051#M6610</guid>
      <dc:creator>vrushalitaklika</dc:creator>
      <dc:date>2017-06-20T05:16:27Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647052#M6611</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;How I said it is completely application dependent. If you only need to convert 10 channels in sequence, you can just use only CFIFO0 and RFIFO0, for instance.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 20 Jun 2017 07:36:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647052#M6611</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2017-06-20T07:36:26Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647053#M6612</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Also you could pay attention to short bulletin I have written:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-329779"&gt;https://community.nxp.com/docs/DOC-329779&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 20 Jun 2017 07:38:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647053#M6612</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2017-06-20T07:38:40Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C EQADC configuration</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647054#M6613</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi David,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you have example of document&amp;nbsp;&lt;A _jive_internal="true" data-containerid="11363" data-containertype="14" data-objectid="329779" data-objecttype="102" href="https://community.nxp.com/docs/DOC-329779" style="color: #5e89c1; background-color: #ffffff; border: 0px; font-size: 14px; padding: 1px 0px 1px calc(12px + 0.35ex);"&gt;eQADC - avoiding unintended result swap&lt;/A&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&amp;nbsp; ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Have you implemented the solutions? I am looking for 4th solution proposed&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;4) To keep regular alternating of commands assigned to ADC0 and ADC1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Thanks&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Vrushali&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Sep 2017 04:30:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-EQADC-configuration/m-p/647054#M6613</guid>
      <dc:creator>vrushalitaklika</dc:creator>
      <dc:date>2017-09-26T04:30:38Z</dc:date>
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