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    <title>topic Re: Tracing exceptions on MPC5604P in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641888#M6392</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;e200 invokes an Illegal Instruction program exception on attempted execution of the following instructions:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Instruction from the illegal instruction class&lt;/LI&gt;&lt;LI&gt;mtspr and mfspr instructions with an undefined SPR specified&lt;/LI&gt;&lt;LI&gt;mtdcr and mfdcr instructions with an undefined DCR specified&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From user point of view it is almost the same as “Unimplemented Operation” exception, thus there is an attempt to execute instruction that does not exist.&lt;/P&gt;&lt;P&gt;“Illegal instruction” means instruction is partially recognized as it is either defined by other e200 platform or reserved for future extensions.&lt;/P&gt;&lt;P&gt;In both cases it is caused by fetching of invalid opcode.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Typically I would see two possible issues:&lt;/P&gt;&lt;P&gt;- either there is an attempt to execute code from some invalid area due to some incorrect branch or&lt;/P&gt;&lt;P&gt;- code is compiled for slightly different core subtype than should (for instance e200z1 instead of e200z0) or used assembly code has been written for different core subtype&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I any case it would be needed to investigate content of SRR0 to find address causing the exception and check where it points to.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 18 Oct 2016 08:49:29 GMT</pubDate>
    <dc:creator>davidtosenovjan</dc:creator>
    <dc:date>2016-10-18T08:49:29Z</dc:date>
    <item>
      <title>Tracing exceptions on MPC5604P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641887#M6391</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi there,&lt;/P&gt;&lt;P&gt;I&amp;nbsp;encounter a&amp;nbsp;strange behavior on some of our PCBs&amp;nbsp;using the MPC5604P.&lt;/P&gt;&lt;P&gt;On a couple of boards I&amp;nbsp;get a &lt;STRONG&gt;program interrupt exception&lt;/STRONG&gt; (IVOR6) caused by an &lt;STRONG&gt;illegal instruction&lt;/STRONG&gt; (PIL bit is set in ESR), but on most of the boards the exact same software is running just fine.&lt;/P&gt;&lt;P&gt;Is there a way to trace down the root cause of this exception, or do you know what could be the reason for it?&lt;/P&gt;&lt;P&gt;I'm using the PE Micro Multilink Debugger.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Tom&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Oct 2016 14:14:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641887#M6391</guid>
      <dc:creator>tommiddelweerd</dc:creator>
      <dc:date>2016-10-17T14:14:38Z</dc:date>
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    <item>
      <title>Re: Tracing exceptions on MPC5604P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641888#M6392</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;e200 invokes an Illegal Instruction program exception on attempted execution of the following instructions:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Instruction from the illegal instruction class&lt;/LI&gt;&lt;LI&gt;mtspr and mfspr instructions with an undefined SPR specified&lt;/LI&gt;&lt;LI&gt;mtdcr and mfdcr instructions with an undefined DCR specified&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From user point of view it is almost the same as “Unimplemented Operation” exception, thus there is an attempt to execute instruction that does not exist.&lt;/P&gt;&lt;P&gt;“Illegal instruction” means instruction is partially recognized as it is either defined by other e200 platform or reserved for future extensions.&lt;/P&gt;&lt;P&gt;In both cases it is caused by fetching of invalid opcode.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Typically I would see two possible issues:&lt;/P&gt;&lt;P&gt;- either there is an attempt to execute code from some invalid area due to some incorrect branch or&lt;/P&gt;&lt;P&gt;- code is compiled for slightly different core subtype than should (for instance e200z1 instead of e200z0) or used assembly code has been written for different core subtype&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I any case it would be needed to investigate content of SRR0 to find address causing the exception and check where it points to.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Oct 2016 08:49:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641888#M6392</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2016-10-18T08:49:29Z</dc:date>
    </item>
    <item>
      <title>Re: Tracing exceptions on MPC5604P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641889#M6393</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi David,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;The content of SRR0 is&amp;nbsp;0x&lt;/SPAN&gt;00014620.&lt;/P&gt;&lt;P&gt;Disassembly instruction on this address is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;0x0001461c: e_lmw r30,40(rsp)&lt;BR /&gt;&lt;STRONG&gt;0x00014620: se_lwz rsp,0(rsp)&lt;/STRONG&gt;&lt;BR /&gt;0x00014622: se_lwz r0,4(rsp)&lt;BR /&gt;0x00014624: se_mtlr r0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This seems to be a valid instruction, also supported by the&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;e200z0 core. At least I think so, although I&amp;nbsp;couldn't find a document with the specific instruction set&amp;nbsp;for this core. Do you know where I can find such a reference document?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;When I try to debug the issue I can step through the code, even passing by the same address/instruction a couple of times&amp;nbsp;without any problem and then at some point it would still throw the i&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;llegal instruction&amp;nbsp;&lt;/SPAN&gt;exception referring to the address&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;00014620.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I almost come to believe that&amp;nbsp;my debugger is misleading me on this one, although I turned off optimization.&lt;/P&gt;&lt;P&gt;The code is compiled for zen (-proc Zen) with the Codewarrior 10.6 IDE. Assembly code is also not used.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your help.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Tom&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Oct 2016 12:21:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641889#M6393</guid>
      <dc:creator>tommiddelweerd</dc:creator>
      <dc:date>2016-10-18T12:21:15Z</dc:date>
    </item>
    <item>
      <title>Re: Tracing exceptions on MPC5604P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641890#M6394</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I should be needed to debug real code (you showed disassembled code but not what is really flashed in MCU). You said it happens on couple of boards thus the issue is repeatable. Is there anything special with these boards like different MCU revisions or something like that?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Oct 2016 14:33:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641890#M6394</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2016-10-24T14:33:57Z</dc:date>
    </item>
    <item>
      <title>Re: Tracing exceptions on MPC5604P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641891#M6395</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi David,&lt;/P&gt;&lt;P&gt;The failing&amp;nbsp;MCUs have different&amp;nbsp;revisions (&lt;SPAN style="color: #42321a; background-color: #ffffff;"&gt;QTH1608K,&amp;nbsp;&lt;SPAN&gt;QRU1606C,&amp;nbsp;&lt;SPAN style="background-color: #ffffff;"&gt;QTH1608L,&amp;nbsp;QRZ1607L, ...&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;), but there seems no general relation&amp;nbsp;between the&amp;nbsp;&lt;SPAN&gt;revisions and the problem.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I also checked the unique serial number that's included in the&amp;nbsp;Test Block of the flash (at address 0x403C10), but I cannot find a relation there either (although I didn't find any description on how to interpret these bits):&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #42321a;"&gt;Wthout error:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #42321a;"&gt;1C12451E C0000034 0044AC4C&amp;nbsp;00000000&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #42321a;"&gt;1C12451E&amp;nbsp;C0000034 00405C1C&amp;nbsp;00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #42321a;"&gt;With error:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #42321a;"&gt;1C12451E C0000034 00449850 00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; color: #42321a;"&gt;1C12451E C0000034 00485428 00000000&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I also did a couple of other&amp;nbsp;checks:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;DMA is disabled&lt;/LI&gt;&lt;LI&gt;Frequency of external 24MHz crystal&amp;nbsp;is OK&lt;/LI&gt;&lt;LI&gt;System PLL and secondary PLL are OK&amp;nbsp;&lt;/LI&gt;&lt;LI&gt;RAM check OK&lt;/LI&gt;&lt;LI&gt;Verified Code Flash&lt;/LI&gt;&lt;LI&gt;Blank check before programming&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Then I encountered a strange behavior. When I cool down the MCU with cooling spray (freeze), the application is running fine, and when I let it rewarm again or use a hot air gun to heat up the MCU (ca.50°C) the exception is triggered.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I have heard of similar issues, corrupting the on-chip flash memory (NVM) through temperature depending bit-flips. Those issues where caused by to high clock speeds when programming the MCU or because of out of range flash core voltage supplies.&lt;/P&gt;&lt;P&gt;But I can't resolve the issue on the failing MCUs even when reprogramming them with low speeds and correct power supply (internal voltage regulator is used to generate the 1.2V core&amp;amp;flash voltage out of the&amp;nbsp;3.3V main power supply).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So I start to think this might be more a hardware issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 25 Oct 2016 10:29:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641891#M6395</guid>
      <dc:creator>tommiddelweerd</dc:creator>
      <dc:date>2016-10-25T10:29:37Z</dc:date>
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      <title>Re: Tracing exceptions on MPC5604P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641892#M6396</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Just to let you know, we found the origin of the issue. It was a failure within the initialization of the internal flash.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;The&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #3d3d3d; font-size: 11.0pt;"&gt;Flash Read Wait State Cycles (RWSC) was set to 1 instead of 2. For our system clock of 64MHz at least 2 wait state cycles are recommended.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: 11.0pt;"&gt; &lt;BR /&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="color: #3d3d3d; font-size: 11.0pt;"&gt;Thanks for the help anyway.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 14 Nov 2016 07:22:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Tracing-exceptions-on-MPC5604P/m-p/641892#M6396</guid>
      <dc:creator>tommiddelweerd</dc:creator>
      <dc:date>2016-11-14T07:22:24Z</dc:date>
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