<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>MPC5xxxのトピックMPC5676R eDMA initialization</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5676R-eDMA-initialization/m-p/602939#M4609</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi NXP,&lt;BR /&gt; &lt;BR /&gt;I am using MPC5676r Platform, and I have questions regarding register SADDR&amp;nbsp;&lt;SPAN&gt;and DADDR of unused EDMA_A.TCD&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;EDMA_A.TCD[xx].SADDR&lt;BR /&gt;EDMA_A.TCD[xx].DADDR&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;During repeated testing of Power on/off of many control boards containing MPC5676r, I have found that external bus memory address is stored in SADDR&amp;nbsp;&lt;SPAN&gt;and DADDR&amp;nbsp;registers. This occurs to particular control board and occrs 80% of the time&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Why does this occrus because I have not initialize the&amp;nbsp;&lt;SPAN&gt;unused &lt;/SPAN&gt;EDMA_A chennel. Or is it possible this could be hardware issue?&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;why does this occurs to the particular control boards and not the other control boards?&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hope helps and Thanks in advance&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Will&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 17 Nov 2016 11:41:59 GMT</pubDate>
    <dc:creator>sangwonjeon</dc:creator>
    <dc:date>2016-11-17T11:41:59Z</dc:date>
    <item>
      <title>MPC5676R eDMA initialization</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5676R-eDMA-initialization/m-p/602939#M4609</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi NXP,&lt;BR /&gt; &lt;BR /&gt;I am using MPC5676r Platform, and I have questions regarding register SADDR&amp;nbsp;&lt;SPAN&gt;and DADDR of unused EDMA_A.TCD&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;EDMA_A.TCD[xx].SADDR&lt;BR /&gt;EDMA_A.TCD[xx].DADDR&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;During repeated testing of Power on/off of many control boards containing MPC5676r, I have found that external bus memory address is stored in SADDR&amp;nbsp;&lt;SPAN&gt;and DADDR&amp;nbsp;registers. This occurs to particular control board and occrs 80% of the time&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Why does this occrus because I have not initialize the&amp;nbsp;&lt;SPAN&gt;unused &lt;/SPAN&gt;EDMA_A chennel. Or is it possible this could be hardware issue?&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;why does this occurs to the particular control boards and not the other control boards?&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hope helps and Thanks in advance&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Will&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Nov 2016 11:41:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5676R-eDMA-initialization/m-p/602939#M4609</guid>
      <dc:creator>sangwonjeon</dc:creator>
      <dc:date>2016-11-17T11:41:59Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5676R eDMA initialization</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5676R-eDMA-initialization/m-p/602940#M4610</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Does it cause any issue to you?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Content of uninitialized eDMA transfer control descriptors should be random as it is basically RAM memory. Typically every byte of particular TCD must be initialized to prevent issues with uninitialized data fields that may contain unexpected values.&lt;/P&gt;&lt;P&gt;However in case particular DMA channel is disabled, it should not mind its channel’s TCD content does not make sense.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 Nov 2016 17:28:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5676R-eDMA-initialization/m-p/602940#M4610</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2016-11-18T17:28:09Z</dc:date>
    </item>
  </channel>
</rss>

