MPC5xxx中的主题 Re: MPC5748G CAN-FD bit timing

MPC5748G CAN-FD bit timing

antoniograu — Mon, 27 Jun 2016 07:37:54 GMT

Hi,

I have a couple of questions. I´m using a MPC5748G and I want to change the bit timming when using CAN-FD mode.

Currently I have CAN-FD working with 500kbps arbritation and 2000Kbps Data Phase working.

Now I want to change the sample point to make some tests.

Is there any document like "FlexCANbitTiming.pdf" but for CAN-FD?

I understood from Reference Manual that CAN-FD arbitration bit timing is affected by CAN_CTRL1 or CAN_CBT and data phase is affected only by register CAN_FDCBT, right?

As far I understood, the CRC on the register is filled at TX: "This register is updated at the same time the Tx Interrupt Flag is asserted."

Is the CAN module checking also the CRC of received frames? Is there a code to calculate CRC of CANFD frames of a non-iso can-fd?

Thanks in advance,

Antonio

Re: MPC5748G CAN-FD bit timing

PetrS — Tue, 28 Jun 2016 07:35:47 GMT

Hi,

Q: Is there any document like "FlexCANbitTiming.pdf" but for CAN-FD?

A: unfortunately not. You should use an info stated within Reference Manual or CAN-FD specification.

Q: I understood from Reference Manual that CAN-FD arbitration bit timing is affected by CAN_CTRL1 or CAN_CBT and data phase is affected only by register CAN_FDCBT, right?

A: Yes, you are right.

Q: Is the CAN module checking also the CRC of received frames? Is there a code to calculate CRC of CAN-FD frames of a non-iso can-fd?

A: There are different CRC polynomials for different CAN frame formats.

- CRC_15 … used for all frames in Classical CAN format.

- CRC_17 … used for frames in CAN FD format with a data field up to 16 bytes long.

- CRC_21 … used for frames in CAN FD format with a data field longer than 16 sixteen bytes.

The receivers use the same polynomial to calculate the check sum from the bits as seen on the bus-lines. Thus when receiving a message, FlexCAN decodes EDL and DLC to select the adequate CRC polynomial to check for a CRC error.

BR, Petr

Re: MPC5748G CAN-FD bit timing

alexvinchev — Tue, 28 Jun 2016 07:51:07 GMT

antoniograu, you might want to look at this topic as well, especially answer from lukaszadrapa:

https://community.nxp.com/thread/377680#comment-575999

CRC calculation of MPC5748G is compliant up to certain version of CAN-FD specification, for later specification, you(we)'ll need newer cut of the devices...

Re: MPC5748G CAN-FD bit timing

antoniograu — Wed, 29 Jun 2016 15:15:46 GMT

Hi Petr,

thanks for your answer.

About the CRC Thema for CAN_FD frames with BRS (Bite Rate Switch) activated:

I´m sending CAN-FD with fixed DLC =15 from FlexCAN1 to FlexCAN2, 3, 4 and 5. So CRC21 will be used.

I can see the register CAN_FDCRC of CAN1 is updated every time a frame is sent.

What I want is to compare the CRC_FD from my CAN1 with the CRC_FD received on the other channels.

My question is:

Is FlexCAN module only showing CRC or CRC-FD errors at Transmission time? Is it possible to check CRC errors at receiving?

Thanks!

Re: MPC5748G CAN-FD bit timing

antoniograu — Wed, 29 Jun 2016 15:17:58 GMT

Yes, I had this discussion last year when I received Cut2. It was a mistake in CAN-FD specification. :smileysad: