topic Re: EBI Bus error causing IVOR1trap, but only after SRAM write in MPC5xxx

EBI Bus error causing IVOR1trap, but only after SRAM write

laurayindra — Mon, 11 Jul 2016 15:06:08 GMT

I was testing internal SRAM on a MPC567xK when the EBI stopped working:

There is 96KB of ramtest SRAM at 0x40021A00, and this error only occurs after a march12 memory test (bother reads and writes to ram) on ramtest.

The error, an IVOR1trap, only occurs on reading from EBI after the test on ramtest.

MCSR is 0x0008800C

BUS_WRERR is also set

MCSSR0 is the last of the following:

e_lis r8,0x30000

e_add16i r3,r8,0x1408

se_lwz r3,0x0(r3)

se_lhz r31,0x4(r3)

MCSRR1 is 0x00008000

Here are the rest of my EBI settings:

MCR: 0x06000004

BMCR: 0x00001980

BR0: 0x20000827

OR0: 0xFFB00000

Why does this IVOR1trap only happen after the test on ramtest SRAM? I don't understand how reading and writing to SRAM is changing the behavior of the EBI bus read.

Re: EBI Bus error causing IVOR1trap, but only after SRAM write

laurayindra — Mon, 11 Jul 2016 18:53:08 GMT

More info:

it is not the SRAM read/write causing the IVOR1trap on an EBI read.

the code called before the SRAM read/write is:

asm void mask_external_interrupts()

{

nofralloc

wrteei 0

blr

}

and the code called after the SRAM read/write but before the IVOR1trap is

asm void unmask_external_interrupts()

{

nofralloc

wrteei 1

blr

}

I can tell you that the EBI read that caused the IVOR1trap is in an interrupt based on an internal timer.

I don't know what this assembly code is doing.

Re: EBI Bus error causing IVOR1trap, but only after SRAM write

davidtosenovjan — Tue, 12 Jul 2016 07:47:37 GMT

How it is related to EBI? You are testing internal SRAM, is it so?

Re: EBI Bus error causing IVOR1trap, but only after SRAM write

laurayindra — Tue, 12 Jul 2016 16:13:34 GMT

The test of internal SRAM was wrapped by mask_external_interrupts() and unmask_external_interrupts().

Removing mask_external_interrupts() and unmask_external_interrupts(), and reducing internal SRAM testing to the unused section of internal SRAM (ramtest) stopped the IVOR1trap on read from EBI.

I don't know, and haven't had time to research, what the assembly in mask_external_interrupts() and unmask_external_interrupts() is doing to cause the IVOR1trap on read from EBI. This read from EBI is being performed from an interrupt routine based on an internal timer.