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    <title>topic MPC55XX:RD_WR/ or OE/ ? in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC55XX-RD-WR-or-OE/m-p/222646#M38</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;lt;MPC5553_MPC5554_RM&amp;gt;,12.4.2 External Bus Operations&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;...&lt;/SPAN&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;To facilitate asynchronous write support, the EBI keeps driving &lt;/SPAN&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;valid write data on the data bus until 1 clock after the rising edge where RD_WR/ (and WE for chip select &lt;/SPAN&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;accesses) are negated.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt; &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;In my project,the RD_WR/ connect to the 74LVTH16245's &lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt; direction-control (DIR) .When RD_WR/ is low,data transmission from the B bus ( MPC data bus)to the A bus(Memory data bus).In Write Cycle(CS Access) ,because RD_WR/ negated earlier ,the 74LVTH16245 does not keep driving &lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;valid data on the A bus after the rising edge of RD_WR/ (the&amp;nbsp; A bus data and the WE[0:3]/ are negated in the same time)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-indent: 0px; color: #000000; background-color: #ffffff;"&gt;Can I use OE/ instead&amp;nbsp; RD_WR/ ( OE/ connect to the &lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;DIR&lt;/SPAN&gt;)?What do I need to pay attention?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 22 Nov 2013 15:29:52 GMT</pubDate>
    <dc:creator>ypchen</dc:creator>
    <dc:date>2013-11-22T15:29:52Z</dc:date>
    <item>
      <title>MPC55XX:RD_WR/ or OE/ ?</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC55XX-RD-WR-or-OE/m-p/222646#M38</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;lt;MPC5553_MPC5554_RM&amp;gt;,12.4.2 External Bus Operations&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;...&lt;/SPAN&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;To facilitate asynchronous write support, the EBI keeps driving &lt;/SPAN&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;valid write data on the data bus until 1 clock after the rising edge where RD_WR/ (and WE for chip select &lt;/SPAN&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;accesses) are negated.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt; &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;In my project,the RD_WR/ connect to the 74LVTH16245's &lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt; direction-control (DIR) .When RD_WR/ is low,data transmission from the B bus ( MPC data bus)to the A bus(Memory data bus).In Write Cycle(CS Access) ,because RD_WR/ negated earlier ,the 74LVTH16245 does not keep driving &lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;valid data on the A bus after the rising edge of RD_WR/ (the&amp;nbsp; A bus data and the WE[0:3]/ are negated in the same time)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-indent: 0px; color: #000000; background-color: #ffffff;"&gt;Can I use OE/ instead&amp;nbsp; RD_WR/ ( OE/ connect to the &lt;SPAN style="background-color: #ffffff; text-indent: 0px; color: #000000;"&gt;DIR&lt;/SPAN&gt;)?What do I need to pay attention?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Nov 2013 15:29:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC55XX-RD-WR-or-OE/m-p/222646#M38</guid>
      <dc:creator>ypchen</dc:creator>
      <dc:date>2013-11-22T15:29:52Z</dc:date>
    </item>
    <item>
      <title>Re: MPC55XX:RD_WR/ or OE/ ?</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC55XX-RD-WR-or-OE/m-p/222647#M39</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;If your project use CS access only, then OE/ could be used instead RD_WR/. Pay attention to setup and hold time during read cycle. Note that OE/ is active low signal whilst RD_WR/ is active high in the context of their functionality.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Dec 2013 12:03:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC55XX-RD-WR-or-OE/m-p/222647#M39</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2013-12-05T12:03:07Z</dc:date>
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