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    <title>topic STAC Interface in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/STAC-Interface/m-p/532642#M3603</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Where can I find more details about STAC "Shared Time and Counter" bus interface of eTPU module of MPC5746R?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I can see few details in section 43.14.6.3 of the reference manual Rev 6.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ahmed&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 03 Jul 2016 13:18:57 GMT</pubDate>
    <dc:creator>ahmedabdelhalee</dc:creator>
    <dc:date>2016-07-03T13:18:57Z</dc:date>
    <item>
      <title>STAC Interface</title>
      <link>https://community.nxp.com/t5/MPC5xxx/STAC-Interface/m-p/532642#M3603</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Where can I find more details about STAC "Shared Time and Counter" bus interface of eTPU module of MPC5746R?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I can see few details in section 43.14.6.3 of the reference manual Rev 6.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Ahmed&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 03 Jul 2016 13:18:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/STAC-Interface/m-p/532642#M3603</guid>
      <dc:creator>ahmedabdelhalee</dc:creator>
      <dc:date>2016-07-03T13:18:57Z</dc:date>
    </item>
    <item>
      <title>Re: STAC Interface</title>
      <link>https://community.nxp.com/t5/MPC5xxx/STAC-Interface/m-p/532643#M3604</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The only info about the STAC bus is given in the RM.&lt;/P&gt;&lt;P&gt;The STAC bus allows an eTPU to export its timebase (TCR1/TCR2) to another eTPU as well as to other peripherals such as the eMIOS. &lt;/P&gt;&lt;P&gt;As you mentioned the STAC is described in the chapter 43.14.6.3. See also chapter 43.7.4 and 43.7.8; the eTPUx REDCR ((eTPU_TBR_STAC_ENGx registers) have to be properly set to configure the eTPU STAC bus operation as a STAC Server/Client module. The Server ID assignment is showed in chapter 43.1.7 STAC bus.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If the STAC-bus Export/Import feature is used, the clock ratio of eTPU : eMIOS should be 1:1 or 2:1&lt;BR /&gt; &lt;/P&gt;&lt;P&gt;Chapter 42.6.3 STAC Bus Client submodule describes STAC bus usage within an eMIOS module. As there are 2 engines (2 eTPU modules) you have 4 fixed time slots.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 04 Jul 2016 09:12:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/STAC-Interface/m-p/532643#M3604</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2016-07-04T09:12:58Z</dc:date>
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