How to verify the integrity of STCU2 which is configured to perform MBIST

VinayYammanuru — Mon, 05 Jan 2026 18:30:13 GMT

Hello Team,

This is regarding MPC5746C controller.

How to check the integrity of STCU2 which is configured to perform the MBIST. Is it handled in micro controller itself?

Re: How to verify the integrity of STCU2 which is configured to perform MBIST

petervlna — Tue, 06 Jan 2026 08:55:15 GMT

Hello,

Is it handled in micro controller itself?

Yes, user can only check results of STCU tests.

Best regards,

Peter

Re: How to verify the integrity of STCU2 which is configured to perform MBIST

VinayYammanuru — Mon, 12 Jan 2026 13:14:55 GMT

Hello Team,

How MBIST detects uncorrectable failures and correctable failures?

Re: How to verify the integrity of STCU2 which is configured to perform MBIST

VinayYammanuru — Mon, 12 Jan 2026 13:25:03 GMT

Hello Team,

How MBIST detects uncorrectable failures and correctable failures?

Is NCF bits for the particular MBIST or STCU to get to know the correctable and uncorrectable failures? or Do we need to read the registers (STCU2_MBSL, STCU2_MBSM and STCU2_MBSH, STCU2_ERR_STAT)

Re: How to verify the integrity of STCU2 which is configured to perform MBIST

petervlna — Tue, 13 Jan 2026 12:40:58 GMT

Hello,

MPC5746C is designed to test on-chip SRAM and flash memories for integrity and reliability. It uses algorithms like March tests to detect memory faults. Here’s how it distinguishes between correctable and uncorrectable failures:

Correctable Failures

These typically occur when ECC (Error Correcting Code) detects a single-bit error in memory. The MBIST controller reads the memory and checks ECC:

If ECC reports a single-bit error, MBIST can correct it on the fly.
The error is logged in the MBIST status registers (e.g., MBIST_ERR_STATUS) as a correctable fault.

Correctable errors do not stop the MBIST process, but they are flagged for diagnostics.

Uncorrectable Failures

These happen when ECC detects a multi-bit error (e.g., 2 or more bits flipped) or a structural fault in memory.
MBIST compares the read data against the expected pattern:

If the mismatch cannot be corrected by ECC, it is marked as uncorrectable.

The MBIST controller sets an error flag and may abort the test depending on configuration.
These errors are reported in the MBIST result registers and can trigger a fault reaction (e.g., via FCCU).

Key Registers & Indicators

MBIST_STATUS → Indicates pass/fail.
MBIST_ERR_STATUS → Shows error type (correctable vs uncorrectable).
ECC-related registers (in SRAM/Flash controllers) also provide details.

NCF bits (Non-Correctable Fault bits) are part of the FCCU (Fault Collection and Control Unit) fault signaling mechanism. They indicate that a fault has been detected and reported by a module (like MBIST or STCU), but they do not provide detailed information about whether the error was correctable or uncorrectable. They just tell you that a fault occurred.

To know whether the MBIST detected correctable vs. uncorrectable failures, you need to read the STCU2 registers:

STCU2_MBSL, STCU2_MBSM, STCU2_MBSH → These hold MBIST signature results for each tested memory block.
STCU2_ERR_STAT → This is the key register that indicates the type of error:

Bits differentiate between correctable ECC errors and uncorrectable errors.
It also shows which memory block caused the error.

So:

NCF bits = high-level fault indication for FCCU reaction.
STCU2 registers = detailed MBIST diagnostic info (correctable vs uncorrectable).

Best regards,

Peter

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How to verify the integrity of STCU2 which is configured to perform MBIST

Re: How to verify the integrity of STCU2 which is configured to perform MBIST

Re: How to verify the integrity of STCU2 which is configured to perform MBIST

Re: How to verify the integrity of STCU2 which is configured to perform MBIST

Re: How to verify the integrity of STCU2 which is configured to perform MBIST