topic Re: Exception IVOR33 in MPC5777C Floating-Point Operations and Exception Conditions. in MPC5xxx

Exception IVOR33 in MPC5777C Floating-Point Operations and Exception Conditions.

kwru — Tue, 25 Nov 2025 03:08:55 GMT

Exception IVOR33 in MPC5777C Floating-Point Operations and Exception Conditions.

I am performing floating-point operations using the MPC5777C. I am encountering Exception IVOR33 and would like to inquire about it.

First, my MSR setting is as follows:
MSR = 0x0202B000 (SPE, FP enabled)

The test data used is:
FLT_MAX = 3.403e+38
FLT_MIN = 1.175e-38
FLT_TRUE_MIN = 1.401e-45

dNum -> double

fNum -> float

Case 1:
dNum = FLT_MAX * 2;
fNum = (float)dNum;
→ Exception did not occur

Case 2:
dNum = FLT_MIN / 2.;
fNum = (float)dNum;
→ Exception did not occur

Case 3:
dNum = FLT_TRUE_MIN / 2;
fNum = (float)dNum;
→ Exception did not occur

Case 4:
fTmp = 1.e+30f;
fNum = fTmp * fTmp;
→ Exception did not occur

Case 5:
fTmp = 1.e-20f;
fNum = fTmp * fTmp;
→ Exception occurred!

Why does an exception not occur in Case 1 when exceeding the upper limit?
Also, I would like to know the precise conditions under which the exception occurs.

Re: Exception IVOR33 in MPC5777C Floating-Point Operations and Exception Conditions.

davidtosenovjan — Tue, 25 Nov 2025 09:25:51 GMT

What is your setting of SPEFSCR register?

Re: Exception IVOR33 in MPC5777C Floating-Point Operations and Exception Conditions.

kwru — Wed, 26 Nov 2025 01:38:32 GMT

I configured FINVE/FDBZE/FUNFE/FOVFE using the SPESFCR register.

When I check the register, however, it shows SPESFCR = 0x0020303B (FINXS/FG/FX/FINVE/FDBZE/FUNFE/FRMC(11)).

It is strange that the FOVFE setting is not reflected even though I enabled it.

Re: Exception IVOR33 in MPC5777C Floating-Point Operations and Exception Conditions.

davidtosenovjan — Wed, 26 Nov 2025 10:59:40 GMT

I have tested it with MPC5674F having the same core (MPC5777C I don't available jut now) and I have set all bits in the register. I guess you could have some problem in your assembler code.

Re: Exception IVOR33 in MPC5777C Floating-Point Operations and Exception Conditions.

kwru — Fri, 05 Dec 2025 05:00:56 GMT

Thank you for your reply.
How was the SPESFCR register configured, and how was it actually set?

What exactly does it mean that all the tests were successful?

When the FOVFE in the SPESFCR register is enabled, does an exception occur in test case No. 1 above?