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    <title>MPC5xxx中的主题 Re: what is Minimum Alignment Requirement for MPC5674F Interrupt Vector Table Section in Linker scri</title>
    <link>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2197649#M28124</link>
    <description>&lt;P&gt;There are defined vectors 32-35 foe SPE/EFPU, so if application uses these engines, it should be define otherwise it is not necessary in principle.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="davidtosenovjan_1-1762190519514.png" style="width: 713px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/363752i264FB01F4AC96D00/image-dimensions/713x271?v=v2" width="713" height="271" role="button" title="davidtosenovjan_1-1762190519514.png" alt="davidtosenovjan_1-1762190519514.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;RTOS may have specific requirement that is needed to keep.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 03 Nov 2025 17:26:09 GMT</pubDate>
    <dc:creator>davidtosenovjan</dc:creator>
    <dc:date>2025-11-03T17:26:09Z</dc:date>
    <item>
      <title>what is Minimum Alignment Requirement for MPC5674F Interrupt Vector Table Section in Linker script ?</title>
      <link>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2195542#M28111</link>
      <description>&lt;P class=""&gt;Hi,&lt;/P&gt;&lt;P class=""&gt;I am trying to understand the correct alignment for the interrupt vector table in linker scripts for MPC5674F.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;P class=""&gt;The documentation mentions "vector offset must be located on a quad-word (16-byte) aligned location".&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;The SDK uses ALIGN(0x1000), but I observed that ALIGN(0x100) also works, while ALIGN(0x10)—&lt;STRONG&gt;which is still 16-byte aligned—does not work.&lt;/STRONG&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;Why does ALIGN(0x10) fail, even though it is technically 16-byte aligned?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;STRONG&gt;Is there any hardware or software reason I should prefer ALIGN(0x100) or 0x1000 over 0x10&lt;/STRONG&gt;?&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P class=""&gt;Appreciate any clarification on why higher alignment is required beyond the stated 16-byte boundary. it would be helpful if we get these details present in any manual.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="CNarendra_0-1761806175133.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/363186i0093AF833919CA54/image-size/medium?v=v2&amp;amp;px=400" role="button" title="CNarendra_0-1761806175133.png" alt="CNarendra_0-1761806175133.png" /&gt;&lt;/span&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="CNarendra_1-1761806203306.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/363188i694EC6C8755EFB1D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="CNarendra_1-1761806203306.png" alt="CNarendra_1-1761806203306.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Thanks&amp;nbsp;&lt;BR /&gt;Narendra.C&lt;BR /&gt;&lt;BR /&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52613"&gt;@davidtosenovjan&lt;/a&gt;&amp;nbsp;,&lt;A href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52961" target="_blank" rel="noopener"&gt;@PetrS&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;LI-PRODUCT title="MPC5674F" id="MPC5674F"&gt;&lt;/LI-PRODUCT&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 30 Oct 2025 06:43:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2195542#M28111</guid>
      <dc:creator>CNarendra</dc:creator>
      <dc:date>2025-10-30T06:43:19Z</dc:date>
    </item>
    <item>
      <title>Re: what is Minimum Alignment Requirement for MPC5674F Interrupt Vector Table Section in Linker scri</title>
      <link>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2195997#M28117</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Theoretically 0x10 could be enough, but if you have the whole vector table in one aligned block i.e. 16 IVORs per 16 bytes, it needs to be aligned to 256 (0x100). &lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;I am not sure what SDK uses, I would recommend to keep it at highest value. It may be due to compatibility with other devices where IVOR addresses are fixed, thus there is requirement for exact alignment, it may be also due to MMU or MPU setup or similar.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;I believe your own baremetal code would work with 0x10 alignment.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 30 Oct 2025 16:44:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2195997#M28117</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2025-10-30T16:44:09Z</dc:date>
    </item>
    <item>
      <title>Re: what is Minimum Alignment Requirement for MPC5674F Interrupt Vector Table Section in Linker scri</title>
      <link>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2197522#M28123</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52613"&gt;@davidtosenovjan&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I’m trying to understand where IVOR16–IVOR63 (reserved / implementation-dependent) should be placed in the linker script for MPC5674F.&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Book_EUM" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/363725iC99779EA5B42585D/image-size/large?v=v2&amp;amp;px=999" role="button" title="image.png" alt="Book_EUM" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Book_EUM&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="MAP File" style="width: 961px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/363727iF20E382109262D9A/image-size/large?v=v2&amp;amp;px=999" role="button" title="Screenshot 2025-11-03 181038.png" alt="MAP File" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;MAP File&lt;/span&gt;&lt;/span&gt;&lt;BR /&gt;&lt;BR /&gt;from SDK generated files there are no vector defined for IVOR16-63 properly.&amp;nbsp;&lt;/P&gt;&lt;P&gt;The e200z7 core reference manual lists IVOR0–15 as defined and IVOR16–63 as reserved or implementation-dependent. Should we still allocate space for IVOR16–63 in the vector table section?&lt;/P&gt;&lt;P&gt;Also, I noticed that ALIGN(0x10) (16-byte alignment) is not working at all with RTOS Application and MMU enabled.&lt;BR /&gt;&lt;BR /&gt;Thanks &amp;amp; Regards&amp;nbsp;&lt;BR /&gt;Narendra.C&lt;/P&gt;</description>
      <pubDate>Mon, 03 Nov 2025 12:46:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2197522#M28123</guid>
      <dc:creator>CNarendra</dc:creator>
      <dc:date>2025-11-03T12:46:01Z</dc:date>
    </item>
    <item>
      <title>Re: what is Minimum Alignment Requirement for MPC5674F Interrupt Vector Table Section in Linker scri</title>
      <link>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2197649#M28124</link>
      <description>&lt;P&gt;There are defined vectors 32-35 foe SPE/EFPU, so if application uses these engines, it should be define otherwise it is not necessary in principle.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="davidtosenovjan_1-1762190519514.png" style="width: 713px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/363752i264FB01F4AC96D00/image-dimensions/713x271?v=v2" width="713" height="271" role="button" title="davidtosenovjan_1-1762190519514.png" alt="davidtosenovjan_1-1762190519514.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;RTOS may have specific requirement that is needed to keep.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 03 Nov 2025 17:26:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/what-is-Minimum-Alignment-Requirement-for-MPC5674F-Interrupt/m-p/2197649#M28124</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2025-11-03T17:26:09Z</dc:date>
    </item>
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