LINFlexd in UART mode with eDMA

CoinFish — Thu, 20 Feb 2025 14:38:38 GMT

Hi, I configured LinFlexD to UART mode and set up DMA channel 0 for transmission, but it triggered a Destination Bus Error. I'm not sure how to resolve this issue. The code as follow. is something i missed?

LINFLEX_3.LINCR1.B.INIT = 1;

LINFLEX_3.LINCR1.B.SLEEP = 0;

LINFLEX_3.LINCR1.B.BF = 0;

LINFLEX_3.UARTCR.B.UART = 1;

LINFLEX_3.UARTCR.B.RXEN = 1;

LINFLEX_3.UARTCR.B.TXEN = 1;

LINFLEX_3.UARTCR.B.WL0 = 1;

LINFLEX_3.UARTCR.B.PC0 = 1;

LINFLEX_3.UARTCR.B.PCE = 0;

LINFLEX_3.UARTCR.B.TFBM = 1;

// LINFLEX_3.UARTCR.B.RFBM = 1;

LINFLEX_3.LINIBRR.B.DIV_M = 20 * 10000 / 96 / 16; // 250k // Baud Rate = 9600, In Case fperi1 = 80 MHz

LINFLEX_3.LINFBRR.B.DIV_F = 0; // 7 // Baud Rate = 9600, In Case fperi1 = 80 MHz

LINFLEX_3.LINIER.B.DRIE = 1;

LINFLEX_3.UARTSR.B.DRFRFE = 1; // Clear Data Reception Completed Flag

LINFLEX_3.UARTSR.B.DTFTFF = 1; // Clear Data Transmission Completed Flag

LINFLEX_3.LINCR1.B.INIT = 0; // Normal Mode

LINFLEX_3.DMATXE.B.DTE0 = 1;

// LINFLEX_3.DMARXE.B.DRE0 = 1;

DMAMUX_0.CHCONFIG[0].R = 0xA5;

// DMAMUX_0.CHCONFIG[1].B.ENBL = 1; // channel 1 uart rx

// DMAMUX_0.CHCONFIG[1].B.TRIG = 0;

// DMAMUX_0.CHCONFIG[1].B.SOURCE = 0x26;

EDMA_0.TCD[0].CITER = 0x8;

EDMA_0.TCD[0].BITER = 0x8;

EDMA_0.TCD[0].NBYTES = 0x1;

EDMA_0.TCD[0].SADDR = (uint32)&lin3_tx_buffer[0];

EDMA_0.TCD[0].SOFF = 0x1;

EDMA_0.TCD[0].SSIZE = 0;

EDMA_0.TCD[0].SLAST = 0xFFFFFFFFFFFFFFF8;

EDMA_0.TCD[0].DADDR = (uint32)(&LINFLEX_3.BDRL) + 3;

EDMA_0.TCD[0].DOFF = 0;

EDMA_0.TCD[0].DSIZE = 0;

EDMA_0.TCD[0].D_REQ = 1;

EDMA_0.TCD[0].INT_MAJ = 1;

EDMA_0.DMAERQL.B.ERQ00 = 1;

There are a few more questions.

1. If I want to periodically send 30 bytes of data in a 20ms task, how do I control the sending and stopping of DMA? Can I enable it during the 20ms task by EDMA_0.DMAERQL.B.ERQ00 = 1; and disable it during the DMA completion interrupt by EDMA_0.DMAERQL.B.ERQ00 = 0?

In another words, how should i restart the DMA periodically in 20ms task or i dont have to do that manually?

2. When LINFlexD is in UART FIFO mode (TFBM = 1)，how many bytes are there in BDR? The manual says there is only one byte, is it true? if it is, why call it a FIFO? should't it be 4 bytes.

3. When there is a Destination Bus Error, you can see that the Citer has been decreasing. Why is this? Shouldn't it stop the DMA transmission? I'm sure no signal is coming out of the serial port, so who gives the DMA request?

thanks

Re: LINFlexd in UART mode with eDMA

davidtosenovjan — Thu, 20 Feb 2025 17:06:48 GMT

1) Setup certain timer for 20ms and after its expiration set START bit of particular DMA TCD.

2) You haven't specified used device. MPC5643L has is as follows, other may have it differently.

3) Yes, bus error stops transmission. If triggered again, it apparently continues.

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