<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: MPC5777C :What is the underlying technology behind IPS, is it NXP proprietary? in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-What-is-the-underlying-technology-behind-IPS-is-it-NXP/m-p/1907174#M25912</link>
    <description>&lt;P&gt;Hi Marc,&lt;/P&gt;
&lt;P&gt;Please allow me some time to look into this. Thanks for your patience!&lt;/P&gt;</description>
    <pubDate>Fri, 12 Jul 2024 15:06:47 GMT</pubDate>
    <dc:creator>Will_Xiaochuan_Chen</dc:creator>
    <dc:date>2024-07-12T15:06:47Z</dc:date>
    <item>
      <title>MPC5777C :What is the underlying technology behind IPS, is it NXP proprietary?</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-What-is-the-underlying-technology-behind-IPS-is-it-NXP/m-p/1902311#M25812</link>
      <description>&lt;P&gt;&lt;SPAN&gt;1) "IPS" when referring to the peripheral bus,is it acronym for "IP Sky Blue"? What is the underlying technology behind this bus, is it NXP proprietary?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;2) "Intelligent bus bridging gasket", referred to in the Platform Configuration Module section "12.1 PCM memory map and register description" of the reference manual. Is this another name for the Peripheral Bridge/AIPS?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Thx&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Marc&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 11 Mar 2025 15:56:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-What-is-the-underlying-technology-behind-IPS-is-it-NXP/m-p/1902311#M25812</guid>
      <dc:creator>Marc_Haddad</dc:creator>
      <dc:date>2025-03-11T15:56:44Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C :What is the underlying technology behind IPS, is it NXP proprietary?</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-What-is-the-underlying-technology-behind-IPS-is-it-NXP/m-p/1907174#M25912</link>
      <description>&lt;P&gt;Hi Marc,&lt;/P&gt;
&lt;P&gt;Please allow me some time to look into this. Thanks for your patience!&lt;/P&gt;</description>
      <pubDate>Fri, 12 Jul 2024 15:06:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-What-is-the-underlying-technology-behind-IPS-is-it-NXP/m-p/1907174#M25912</guid>
      <dc:creator>Will_Xiaochuan_Chen</dc:creator>
      <dc:date>2024-07-12T15:06:47Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C :What is the underlying technology behind IPS, is it NXP proprietary?</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-What-is-the-underlying-technology-behind-IPS-is-it-NXP/m-p/1910074#M25966</link>
      <description>&lt;P&gt;Hi Marc,&lt;/P&gt;
&lt;P&gt;1) For IPS, it does refer to "IP Sky blue". Here's an AppNote AN3952 of MPC56xP&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/application-note/AN3952.pdf" target="_blank"&gt;AN3952, Qorivva MPC560xP and MPC564xL Compatibility - Application Notes (nxp.com)&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;that has a section to explain what the AIPS is. The A in AIPS stands for AHB bus which is an ARM IP, and then IPS is an NXP proprietary that's historically named Sky Blue (due to the diagram line being drawn in blue color)&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Will_Xiaochuan_Chen_0-1721163728650.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/288822i01C1910A383EC67A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Will_Xiaochuan_Chen_0-1721163728650.png" alt="Will_Xiaochuan_Chen_0-1721163728650.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;2)The block diagram of the device shows that the PCM peripheral is connected via Bridge B, which the bridge is AIPS_0. So, the "Intelligent bus bridging gasket" should just refer to the AIPS bus/bridge.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Will_Xiaochuan_Chen_1-1721164773390.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/288824i51836AA20DE13520/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Will_Xiaochuan_Chen_1-1721164773390.png" alt="Will_Xiaochuan_Chen_1-1721164773390.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 16 Jul 2024 21:20:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-What-is-the-underlying-technology-behind-IPS-is-it-NXP/m-p/1910074#M25966</guid>
      <dc:creator>Will_Xiaochuan_Chen</dc:creator>
      <dc:date>2024-07-16T21:20:18Z</dc:date>
    </item>
  </channel>
</rss>

