MPC5xxxのトピックRe: CRC_DMA

CRC_DMA

Mennazz — Tue, 14 May 2024 15:18:18 GMT

I tried to use DMA to transfer data to the CRC data register in order to comply with this safety requirement.

but surprisingly, the execution time increased when I used the DMA to transfer the data to the CRC_INP register.

Re: CRC_DMA

lukaszadrapa — Fri, 17 May 2024 10:33:28 GMT

how much data you transfer to CRC_INP?

If you have just a few bytes/words, the configuration of DMA can take more time than short loop feeding the data to CRC_INP directly.

If you have some large data, usage of DMA does not necessarily mean that the transfer will be faster than core. It means that the core can do other things in parallel which could increase the performance a lot. The DMA transfer rate depends on other DMA channels, on priorities etc.

Regards,

Lukas

Re: CRC_DMA

Mennazz — Sun, 26 May 2024 09:51:59 GMT

Since the CRC calculates based on the value of the INP register, is it possible to feed the INP1 register with more than 4 bytes using DMA? The way I used to pass the data was by giving the DMA every 4 bytes separately with the destination address of the INP1 register. Is there any better approach to reduce the execution time, or is it feasible to pass more than 4 bytes to the INP1 via DMA?

Re: CRC_DMA

davidtosenovjan — Tue, 28 May 2024 11:33:24 GMT

Your approach is correct. INP1 register width is 32-bit so 4 byte write must be maximum.
You could also increase priority for DMA master over CPU on the XBAR module, it could increase performance.