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    <title>topic FCCU problems about MPC5744P in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1825902#M25035</link>
    <description>&lt;P&gt;The example is provided by NXP. :fccu_fault_injection_mpc5744p&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="shaoduoduo_0-1710231064306.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/267740i58E42D90A4C6600A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="shaoduoduo_0-1710231064306.png" alt="shaoduoduo_0-1710231064306.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have change the setting of the FCCU, to test the sequence of the EOUT[0] and EOUT[1].&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="shaoduoduo_1-1710231149878.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/267741iBB46E5BD71D66676/image-size/medium?v=v2&amp;amp;px=400" role="button" title="shaoduoduo_1-1710231149878.png" alt="shaoduoduo_1-1710231149878.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When the &lt;SPAN&gt;fccu1_EoutConfig0.mode&amp;nbsp;&lt;/SPAN&gt; is set to FCCU_FO_BISTABLE. The output is not change when FCCU go to error state. The sequence of the&amp;nbsp;&lt;SPAN&gt;EOUT[0] and EOUT[1] is not right. EOUT[0] is always high, and EOUT[1] is always low.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;They do&amp;nbsp; not change when the FCCU state changes.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But when fccu1_EoutConfig0.mode&amp;nbsp; is set to FCCU_FO_DUAL_RAIL or FCCU_FO_TIME_SWITCHING. The output sequence of the&amp;nbsp;EOUT[0] and EOUT[1]&amp;nbsp; is right.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;can you tell me the reason.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Below is my setting code .&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regard.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* ###################################################################&lt;BR /&gt;** This component module is generated by Processor Expert. Do not modify it.&lt;BR /&gt;** Filename : fccu1.c&lt;BR /&gt;** Project : fccu_fault_injection_mpc5744p&lt;BR /&gt;** Processor : MPC5744P_144&lt;BR /&gt;** Component : fccu&lt;BR /&gt;** Version : Component C55_Repository, Driver 01.00, CPU db: 3.00.000&lt;BR /&gt;** Repository : SDK_S32_PA_11&lt;BR /&gt;** Compiler : GNU C Compiler&lt;BR /&gt;** Date/Time : 2024-03-09, 10:48, # CodeGen: 0&lt;BR /&gt;**&lt;BR /&gt;** Copyright 1997 - 2015 Freescale Semiconductor, Inc.&lt;BR /&gt;** Copyright 2016-2017 NXP&lt;BR /&gt;** All Rights Reserved.&lt;BR /&gt;**&lt;BR /&gt;** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR&lt;BR /&gt;** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES&lt;BR /&gt;** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.&lt;BR /&gt;** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,&lt;BR /&gt;** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES&lt;BR /&gt;** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR&lt;BR /&gt;** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)&lt;BR /&gt;** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,&lt;BR /&gt;** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING&lt;BR /&gt;** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF&lt;BR /&gt;** THE POSSIBILITY OF SUCH DAMAGE.&lt;BR /&gt;** ###################################################################*/&lt;BR /&gt;/*!&lt;BR /&gt;** @file fccu1.c&lt;BR /&gt;** &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/222922"&gt;@version&lt;/a&gt; 01.00&lt;BR /&gt;*/&lt;BR /&gt;/*!&lt;BR /&gt;** @addtogroup fccu1_module fccu1 module documentation&lt;BR /&gt;** @{&lt;BR /&gt;*/&lt;BR /&gt;/*&lt;BR /&gt;* @page misra_violations MISRA-C:2012 violations&lt;BR /&gt;*&lt;BR /&gt;* @section [global]&lt;BR /&gt;* Violates MISRA 2012 Advisory Rule 8.7, External could be made static.&lt;BR /&gt;* The function is defined for use by application code.&lt;BR /&gt;*&lt;BR /&gt;* @section [global]&lt;BR /&gt;* Violates MISRA 2012 Required Rule 10.1, Unpermitted operand to operator '&amp;lt;&amp;lt;'&lt;BR /&gt;* The shifting operation don't exceed size of the variable, used to mark bit&lt;BR /&gt;* flags for different actions&lt;BR /&gt;*&lt;BR /&gt;* @section [global]&lt;BR /&gt;* Violates MISRA 2012 Required Rule 11.8, Attempt to cast away const/volatile from&lt;BR /&gt;* a pointer or reference&lt;BR /&gt;* The cast is required to initialize the pointer for EOUT configuration structure&lt;BR /&gt;*&lt;BR /&gt;*/&lt;/P&gt;&lt;P&gt;/* MODULE fccu1. */&lt;/P&gt;&lt;P&gt;#include "fccu1.h"&lt;/P&gt;&lt;P&gt;/*! fccu1 configuration structure */&lt;BR /&gt;/*! @brief Noncritical fault configuration 0 */&lt;BR /&gt;/*! @brief Number 0 */&lt;BR /&gt;const fccu_config_ncf_t fccu1_NcfConfig0_0 =&lt;BR /&gt;{&lt;BR /&gt;.functionID = 8U,&lt;BR /&gt;.hwSwRecovery = FCCU_NCF_SW_REC_FAULT,&lt;BR /&gt;.reset = FCCU_NCFS_SHORT_RESET,&lt;BR /&gt;.timeoutEnable = false,&lt;BR /&gt;.reactionType = 0U,&lt;BR /&gt;.callback = NULL,&lt;BR /&gt;.callbackParam = NULL&lt;BR /&gt;};&lt;BR /&gt;/*! @brief Number 1 */&lt;BR /&gt;const fccu_config_ncf_t fccu1_NcfConfig0_1 =&lt;BR /&gt;{&lt;BR /&gt;.functionID = 12U,&lt;BR /&gt;.hwSwRecovery = FCCU_NCF_HW_REC_FAULT,&lt;BR /&gt;.reset = FCCU_NCFS_NO_RESET,&lt;BR /&gt;.timeoutEnable = false,&lt;BR /&gt;.reactionType = (1&amp;lt;&amp;lt;FCCU_INT_NMI),&lt;BR /&gt;.callback = NULL,&lt;BR /&gt;.callbackParam = NULL&lt;BR /&gt;};&lt;BR /&gt;/*! @brief Number 2 */&lt;BR /&gt;const fccu_config_ncf_t fccu1_NcfConfig0_2 =&lt;BR /&gt;{&lt;BR /&gt;.functionID = 69U,&lt;BR /&gt;.hwSwRecovery = FCCU_NCF_SW_REC_FAULT,&lt;BR /&gt;.reset = FCCU_NCFS_NO_RESET,&lt;BR /&gt;.timeoutEnable = true,&lt;BR /&gt;.reactionType = (1&amp;lt;&amp;lt;FCCU_INT_ALARM),&lt;BR /&gt;.callback = TestAlarm,&lt;BR /&gt;.callbackParam = NULL&lt;BR /&gt;};&lt;BR /&gt;/*! @brief Configuration 0 */&lt;BR /&gt;const fccu_config_ncf_t * fccu1_NcfConfig0[] =&lt;BR /&gt;{&lt;BR /&gt;&amp;amp;fccu1_NcfConfig0_0,&lt;BR /&gt;&amp;amp;fccu1_NcfConfig0_1,&lt;BR /&gt;&amp;amp;fccu1_NcfConfig0_2&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/*! @brief EOUT configuration */&lt;BR /&gt;/*! @brief Configuration 0 */&lt;BR /&gt;const fccu_eout_config_t fccu1_EoutConfig0 =&lt;BR /&gt;{&lt;BR /&gt;.activate = true,&lt;BR /&gt;.control = FCCU_FO_CONTROLLED_BY_FSM,//FCCU_FO_HIGH_UNTIL_FALUT_OCCUR,//FCCU_FO_CONTROLLED_BY_FSM,FCCU_FO_ALLWAY_LOW&lt;BR /&gt;.switchMode = false,&lt;BR /&gt;.mode = FCCU_FO_BISTABLE,// FCCU_FO_TIME_SWITCHING FCCU_FO_BISTABLE FCCU_FO_DUAL_RAIL&lt;BR /&gt;.prescaler = 10U,&lt;BR /&gt;.phase = FCCU_FO_OPPOSITE_PHASE_10,&lt;BR /&gt;.polarity = false,//false&lt;BR /&gt;.deltaFaultInterval = 0U&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/*! @brief Control configuration */&lt;BR /&gt;/*! @brief Configuration 0 */&lt;BR /&gt;const fccu_control_t fccu1_Control0 =&lt;BR /&gt;{&lt;BR /&gt;.filterBypass = false,&lt;BR /&gt;.filterWidth = FCCU_FILTERWIDTH_UP_TO_50_US,&lt;BR /&gt;.debugEnable = false,&lt;BR /&gt;.irqEnableType = FCCU_IRQ_EN_NOIRQ,&lt;BR /&gt;.ncfTimeout = 2000U,&lt;BR /&gt;.configRun = (fccu_eout_config_t *)&amp;amp;fccu1_EoutConfig0,&lt;BR /&gt;.lockType = FCCU_LOCK_TYPE_NO_LOCK,&lt;BR /&gt;.ncfConfigNumber = 3U,&lt;BR /&gt;.callbackIsr = NULL,&lt;BR /&gt;.callbackIsrParam = NULL&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;/* END fccu1. */&lt;BR /&gt;/*!&lt;BR /&gt;** @}&lt;BR /&gt;*/&lt;BR /&gt;/*&lt;BR /&gt;** ###################################################################&lt;BR /&gt;**&lt;BR /&gt;** This file was created by Processor Expert 10.1 [05.21]&lt;BR /&gt;** for the NXP C55 series of microcontrollers.&lt;BR /&gt;**&lt;BR /&gt;** ###################################################################&lt;BR /&gt;*/&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 12 Mar 2024 08:15:24 GMT</pubDate>
    <dc:creator>shaoduoduo</dc:creator>
    <dc:date>2024-03-12T08:15:24Z</dc:date>
    <item>
      <title>FCCU problems about MPC5744P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1825902#M25035</link>
      <description>&lt;P&gt;The example is provided by NXP. :fccu_fault_injection_mpc5744p&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="shaoduoduo_0-1710231064306.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/267740i58E42D90A4C6600A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="shaoduoduo_0-1710231064306.png" alt="shaoduoduo_0-1710231064306.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have change the setting of the FCCU, to test the sequence of the EOUT[0] and EOUT[1].&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="shaoduoduo_1-1710231149878.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/267741iBB46E5BD71D66676/image-size/medium?v=v2&amp;amp;px=400" role="button" title="shaoduoduo_1-1710231149878.png" alt="shaoduoduo_1-1710231149878.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;When the &lt;SPAN&gt;fccu1_EoutConfig0.mode&amp;nbsp;&lt;/SPAN&gt; is set to FCCU_FO_BISTABLE. The output is not change when FCCU go to error state. The sequence of the&amp;nbsp;&lt;SPAN&gt;EOUT[0] and EOUT[1] is not right. EOUT[0] is always high, and EOUT[1] is always low.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;They do&amp;nbsp; not change when the FCCU state changes.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But when fccu1_EoutConfig0.mode&amp;nbsp; is set to FCCU_FO_DUAL_RAIL or FCCU_FO_TIME_SWITCHING. The output sequence of the&amp;nbsp;EOUT[0] and EOUT[1]&amp;nbsp; is right.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;can you tell me the reason.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Below is my setting code .&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regard.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* ###################################################################&lt;BR /&gt;** This component module is generated by Processor Expert. Do not modify it.&lt;BR /&gt;** Filename : fccu1.c&lt;BR /&gt;** Project : fccu_fault_injection_mpc5744p&lt;BR /&gt;** Processor : MPC5744P_144&lt;BR /&gt;** Component : fccu&lt;BR /&gt;** Version : Component C55_Repository, Driver 01.00, CPU db: 3.00.000&lt;BR /&gt;** Repository : SDK_S32_PA_11&lt;BR /&gt;** Compiler : GNU C Compiler&lt;BR /&gt;** Date/Time : 2024-03-09, 10:48, # CodeGen: 0&lt;BR /&gt;**&lt;BR /&gt;** Copyright 1997 - 2015 Freescale Semiconductor, Inc.&lt;BR /&gt;** Copyright 2016-2017 NXP&lt;BR /&gt;** All Rights Reserved.&lt;BR /&gt;**&lt;BR /&gt;** THIS SOFTWARE IS PROVIDED BY NXP "AS IS" AND ANY EXPRESSED OR&lt;BR /&gt;** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES&lt;BR /&gt;** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.&lt;BR /&gt;** IN NO EVENT SHALL NXP OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,&lt;BR /&gt;** INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES&lt;BR /&gt;** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR&lt;BR /&gt;** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)&lt;BR /&gt;** HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,&lt;BR /&gt;** STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING&lt;BR /&gt;** IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF&lt;BR /&gt;** THE POSSIBILITY OF SUCH DAMAGE.&lt;BR /&gt;** ###################################################################*/&lt;BR /&gt;/*!&lt;BR /&gt;** @file fccu1.c&lt;BR /&gt;** &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/222922"&gt;@version&lt;/a&gt; 01.00&lt;BR /&gt;*/&lt;BR /&gt;/*!&lt;BR /&gt;** @addtogroup fccu1_module fccu1 module documentation&lt;BR /&gt;** @{&lt;BR /&gt;*/&lt;BR /&gt;/*&lt;BR /&gt;* @page misra_violations MISRA-C:2012 violations&lt;BR /&gt;*&lt;BR /&gt;* @section [global]&lt;BR /&gt;* Violates MISRA 2012 Advisory Rule 8.7, External could be made static.&lt;BR /&gt;* The function is defined for use by application code.&lt;BR /&gt;*&lt;BR /&gt;* @section [global]&lt;BR /&gt;* Violates MISRA 2012 Required Rule 10.1, Unpermitted operand to operator '&amp;lt;&amp;lt;'&lt;BR /&gt;* The shifting operation don't exceed size of the variable, used to mark bit&lt;BR /&gt;* flags for different actions&lt;BR /&gt;*&lt;BR /&gt;* @section [global]&lt;BR /&gt;* Violates MISRA 2012 Required Rule 11.8, Attempt to cast away const/volatile from&lt;BR /&gt;* a pointer or reference&lt;BR /&gt;* The cast is required to initialize the pointer for EOUT configuration structure&lt;BR /&gt;*&lt;BR /&gt;*/&lt;/P&gt;&lt;P&gt;/* MODULE fccu1. */&lt;/P&gt;&lt;P&gt;#include "fccu1.h"&lt;/P&gt;&lt;P&gt;/*! fccu1 configuration structure */&lt;BR /&gt;/*! @brief Noncritical fault configuration 0 */&lt;BR /&gt;/*! @brief Number 0 */&lt;BR /&gt;const fccu_config_ncf_t fccu1_NcfConfig0_0 =&lt;BR /&gt;{&lt;BR /&gt;.functionID = 8U,&lt;BR /&gt;.hwSwRecovery = FCCU_NCF_SW_REC_FAULT,&lt;BR /&gt;.reset = FCCU_NCFS_SHORT_RESET,&lt;BR /&gt;.timeoutEnable = false,&lt;BR /&gt;.reactionType = 0U,&lt;BR /&gt;.callback = NULL,&lt;BR /&gt;.callbackParam = NULL&lt;BR /&gt;};&lt;BR /&gt;/*! @brief Number 1 */&lt;BR /&gt;const fccu_config_ncf_t fccu1_NcfConfig0_1 =&lt;BR /&gt;{&lt;BR /&gt;.functionID = 12U,&lt;BR /&gt;.hwSwRecovery = FCCU_NCF_HW_REC_FAULT,&lt;BR /&gt;.reset = FCCU_NCFS_NO_RESET,&lt;BR /&gt;.timeoutEnable = false,&lt;BR /&gt;.reactionType = (1&amp;lt;&amp;lt;FCCU_INT_NMI),&lt;BR /&gt;.callback = NULL,&lt;BR /&gt;.callbackParam = NULL&lt;BR /&gt;};&lt;BR /&gt;/*! @brief Number 2 */&lt;BR /&gt;const fccu_config_ncf_t fccu1_NcfConfig0_2 =&lt;BR /&gt;{&lt;BR /&gt;.functionID = 69U,&lt;BR /&gt;.hwSwRecovery = FCCU_NCF_SW_REC_FAULT,&lt;BR /&gt;.reset = FCCU_NCFS_NO_RESET,&lt;BR /&gt;.timeoutEnable = true,&lt;BR /&gt;.reactionType = (1&amp;lt;&amp;lt;FCCU_INT_ALARM),&lt;BR /&gt;.callback = TestAlarm,&lt;BR /&gt;.callbackParam = NULL&lt;BR /&gt;};&lt;BR /&gt;/*! @brief Configuration 0 */&lt;BR /&gt;const fccu_config_ncf_t * fccu1_NcfConfig0[] =&lt;BR /&gt;{&lt;BR /&gt;&amp;amp;fccu1_NcfConfig0_0,&lt;BR /&gt;&amp;amp;fccu1_NcfConfig0_1,&lt;BR /&gt;&amp;amp;fccu1_NcfConfig0_2&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/*! @brief EOUT configuration */&lt;BR /&gt;/*! @brief Configuration 0 */&lt;BR /&gt;const fccu_eout_config_t fccu1_EoutConfig0 =&lt;BR /&gt;{&lt;BR /&gt;.activate = true,&lt;BR /&gt;.control = FCCU_FO_CONTROLLED_BY_FSM,//FCCU_FO_HIGH_UNTIL_FALUT_OCCUR,//FCCU_FO_CONTROLLED_BY_FSM,FCCU_FO_ALLWAY_LOW&lt;BR /&gt;.switchMode = false,&lt;BR /&gt;.mode = FCCU_FO_BISTABLE,// FCCU_FO_TIME_SWITCHING FCCU_FO_BISTABLE FCCU_FO_DUAL_RAIL&lt;BR /&gt;.prescaler = 10U,&lt;BR /&gt;.phase = FCCU_FO_OPPOSITE_PHASE_10,&lt;BR /&gt;.polarity = false,//false&lt;BR /&gt;.deltaFaultInterval = 0U&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/*! @brief Control configuration */&lt;BR /&gt;/*! @brief Configuration 0 */&lt;BR /&gt;const fccu_control_t fccu1_Control0 =&lt;BR /&gt;{&lt;BR /&gt;.filterBypass = false,&lt;BR /&gt;.filterWidth = FCCU_FILTERWIDTH_UP_TO_50_US,&lt;BR /&gt;.debugEnable = false,&lt;BR /&gt;.irqEnableType = FCCU_IRQ_EN_NOIRQ,&lt;BR /&gt;.ncfTimeout = 2000U,&lt;BR /&gt;.configRun = (fccu_eout_config_t *)&amp;amp;fccu1_EoutConfig0,&lt;BR /&gt;.lockType = FCCU_LOCK_TYPE_NO_LOCK,&lt;BR /&gt;.ncfConfigNumber = 3U,&lt;BR /&gt;.callbackIsr = NULL,&lt;BR /&gt;.callbackIsrParam = NULL&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;/* END fccu1. */&lt;BR /&gt;/*!&lt;BR /&gt;** @}&lt;BR /&gt;*/&lt;BR /&gt;/*&lt;BR /&gt;** ###################################################################&lt;BR /&gt;**&lt;BR /&gt;** This file was created by Processor Expert 10.1 [05.21]&lt;BR /&gt;** for the NXP C55 series of microcontrollers.&lt;BR /&gt;**&lt;BR /&gt;** ###################################################################&lt;BR /&gt;*/&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 12 Mar 2024 08:15:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1825902#M25035</guid>
      <dc:creator>shaoduoduo</dc:creator>
      <dc:date>2024-03-12T08:15:24Z</dc:date>
    </item>
    <item>
      <title>Re: FCCU problems about MPC5744P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1827215#M25058</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;BLOCKQUOTE&gt;
&lt;P&gt;When the fccu1_EoutConfig0.mode is set to FCCU_FO_BISTABLE. The output is not change when FCCU go to error state. The sequence of the EOUT[0] and EOUT[1] is not right. EOUT[0] is always high, and EOUT[1] is always low.&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;P&gt;Well, ok. So are you injecting the FCCU error in order to get the FCCU into error state?&lt;/P&gt;
&lt;P&gt;Second, FCCU is state machine, so in case you configure it correctly it will represent the behavior of configuration.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Peter&lt;/P&gt;</description>
      <pubDate>Wed, 13 Mar 2024 13:48:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1827215#M25058</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2024-03-13T13:48:27Z</dc:date>
    </item>
    <item>
      <title>Re: FCCU problems about MPC5744P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1827273#M25061</link>
      <description>&lt;P&gt;yes .I did&amp;nbsp; inject the FCCU error in order to get the FCCU into error state.&lt;/P&gt;&lt;P&gt;But when fccu1_EoutConfig0.mode is set to FCCU_FO_DUAL_RAIL or FCCU_FO_TIME_SWITCHING. The output sequence of the EOUT[0] and EOUT[1] is right.when I injected errors,the output changed like this&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="shaoduoduo_0-1710340998353.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268126iA6E24C336927BB1E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="shaoduoduo_0-1710340998353.png" alt="shaoduoduo_0-1710340998353.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;.&amp;nbsp;&lt;/P&gt;&lt;P&gt;but when I set&amp;nbsp; fccu1_EoutConfig0.mode to&amp;nbsp; bitstable only,the output did not changed when I injected error.&lt;/P&gt;&lt;P&gt;I don't know where the settings are incorrect.&lt;/P&gt;&lt;P&gt;thanks very much&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 13 Mar 2024 14:45:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1827273#M25061</guid>
      <dc:creator>shaoduoduo</dc:creator>
      <dc:date>2024-03-13T14:45:02Z</dc:date>
    </item>
    <item>
      <title>Re: FCCU problems about MPC5744P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1827812#M25062</link>
      <description>&lt;P&gt;could you give me a demo which use bitsatble setting and run on the devkit-MPC5744P board。&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 01:02:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1827812#M25062</guid>
      <dc:creator>shaoduoduo</dc:creator>
      <dc:date>2024-03-14T01:02:10Z</dc:date>
    </item>
    <item>
      <title>Re: FCCU problems about MPC5744P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1828138#M25063</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;So you inject error before you change the protocol?&lt;/P&gt;
&lt;P&gt;First change it and then inject error. Config mode is not accessible when you have fault active.&lt;/P&gt;
&lt;P&gt;Also what about your FCCU CFG register?&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="petervlna_0-1710400058657.png" style="width: 568px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268322iF937A2B93FC8B011/image-dimensions/568x111?v=v2" width="568" height="111" role="button" title="petervlna_0-1710400058657.png" alt="petervlna_0-1710400058657.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;And also, do you enable the fault for Bi-stable?&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="petervlna_1-1710400201083.png" style="width: 605px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/268323i958C0965167A9CF4/image-dimensions/605x392?v=v2" width="605" height="392" role="button" title="petervlna_1-1710400201083.png" alt="petervlna_1-1710400201083.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;There is really no magic here, just set it correctly and it will output the signals.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Peter&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 07:10:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1828138#M25063</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2024-03-14T07:10:49Z</dc:date>
    </item>
    <item>
      <title>Re: FCCU problems about MPC5744P</title>
      <link>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1828236#M25066</link>
      <description>&lt;P&gt;thank you very much.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I add FCCU.EOUT_SIG_EN[0].R = 0xffffff,and the err OUT changed when the err o&lt;SPAN class=""&gt;ccur&lt;/SPAN&gt;ed.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;god bless you .&lt;/P&gt;</description>
      <pubDate>Thu, 14 Mar 2024 08:37:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/FCCU-problems-about-MPC5744P/m-p/1828236#M25066</guid>
      <dc:creator>shaoduoduo</dc:creator>
      <dc:date>2024-03-14T08:37:29Z</dc:date>
    </item>
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