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    <title>topic keep SRAM data in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1778261#M24657</link>
    <description>&lt;P&gt;hi,&lt;/P&gt;&lt;P&gt;i use S32DS for Power v2.1&amp;nbsp; create a MPC5748G&amp;nbsp; core0 project,and change the linker file,because i need a custom SRAM area,so i add a new section.&lt;/P&gt;&lt;P&gt;but ,if write or read data in this SRAM area ,the core0 will stop.&lt;/P&gt;&lt;P&gt;then i compare the linker file :&lt;/P&gt;&lt;P&gt;this is unmodified:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="oceansea_3-1703123671673.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/255382iCA2ACD5D1ABB8E96/image-size/medium?v=v2&amp;amp;px=400" role="button" title="oceansea_3-1703123671673.png" alt="oceansea_3-1703123671673.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;modify:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="oceansea_1-1703123135443.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/255380i656DEEBA8DA733AB/image-size/medium?v=v2&amp;amp;px=400" role="button" title="oceansea_1-1703123135443.png" alt="oceansea_1-1703123135443.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And the startup_MPC5748G.S will Initialise SRAM ECC&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="oceansea_2-1703123237842.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/255381i336C446A8FAE724C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="oceansea_2-1703123237842.png" alt="oceansea_2-1703123237842.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;so, after change,this SRAM area is not initialized causing a read/write crash.&lt;/P&gt;&lt;P&gt;but,i hope that the data in custom SRAM will not be cleared,when the core0 is soft reset.&lt;/P&gt;&lt;P&gt;here is how i soft reset core0:&lt;/P&gt;&lt;P&gt;MC_ME-&amp;gt;MCTL= 0x00005AF0;&lt;/P&gt;&lt;P&gt;MC_ME-&amp;gt;MCTL = 0x0000A50F;&lt;/P&gt;&lt;P&gt;so my question is:&lt;/P&gt;&lt;P&gt;If the custom SRAM(my new section) have no&amp;nbsp;Initialise,the core0 will err when read/write ;&lt;/P&gt;&lt;P&gt;but i need keep the data when core0 soft reset.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;oceansea&amp;nbsp;&lt;/P&gt;&lt;P&gt;best wish.&lt;/P&gt;</description>
    <pubDate>Thu, 21 Dec 2023 01:57:02 GMT</pubDate>
    <dc:creator>oceansea</dc:creator>
    <dc:date>2023-12-21T01:57:02Z</dc:date>
    <item>
      <title>keep SRAM data</title>
      <link>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1778261#M24657</link>
      <description>&lt;P&gt;hi,&lt;/P&gt;&lt;P&gt;i use S32DS for Power v2.1&amp;nbsp; create a MPC5748G&amp;nbsp; core0 project,and change the linker file,because i need a custom SRAM area,so i add a new section.&lt;/P&gt;&lt;P&gt;but ,if write or read data in this SRAM area ,the core0 will stop.&lt;/P&gt;&lt;P&gt;then i compare the linker file :&lt;/P&gt;&lt;P&gt;this is unmodified:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="oceansea_3-1703123671673.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/255382iCA2ACD5D1ABB8E96/image-size/medium?v=v2&amp;amp;px=400" role="button" title="oceansea_3-1703123671673.png" alt="oceansea_3-1703123671673.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;modify:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="oceansea_1-1703123135443.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/255380i656DEEBA8DA733AB/image-size/medium?v=v2&amp;amp;px=400" role="button" title="oceansea_1-1703123135443.png" alt="oceansea_1-1703123135443.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And the startup_MPC5748G.S will Initialise SRAM ECC&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="oceansea_2-1703123237842.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/255381i336C446A8FAE724C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="oceansea_2-1703123237842.png" alt="oceansea_2-1703123237842.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;so, after change,this SRAM area is not initialized causing a read/write crash.&lt;/P&gt;&lt;P&gt;but,i hope that the data in custom SRAM will not be cleared,when the core0 is soft reset.&lt;/P&gt;&lt;P&gt;here is how i soft reset core0:&lt;/P&gt;&lt;P&gt;MC_ME-&amp;gt;MCTL= 0x00005AF0;&lt;/P&gt;&lt;P&gt;MC_ME-&amp;gt;MCTL = 0x0000A50F;&lt;/P&gt;&lt;P&gt;so my question is:&lt;/P&gt;&lt;P&gt;If the custom SRAM(my new section) have no&amp;nbsp;Initialise,the core0 will err when read/write ;&lt;/P&gt;&lt;P&gt;but i need keep the data when core0 soft reset.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;oceansea&amp;nbsp;&lt;/P&gt;&lt;P&gt;best wish.&lt;/P&gt;</description>
      <pubDate>Thu, 21 Dec 2023 01:57:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1778261#M24657</guid>
      <dc:creator>oceansea</dc:creator>
      <dc:date>2023-12-21T01:57:02Z</dc:date>
    </item>
    <item>
      <title>Re: keep SRAM data</title>
      <link>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1778746#M24663</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Well, it depends on if the RAM content is destroyed by your BIST tests.&lt;/P&gt;
&lt;P&gt;If yes, then you need to disable BIST or exclude some RAM part from it.&lt;/P&gt;
&lt;P&gt;Reading what you wrote, looks like you are running BIST on SW reset, or your reset destroys RAM content at all.&lt;/P&gt;
&lt;P&gt;On the Short functional reset, the RAM content is preserved, and on the long functional reset also but only if memory BIST is not active.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Peter&lt;/P&gt;</description>
      <pubDate>Thu, 21 Dec 2023 13:07:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1778746#M24663</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2023-12-21T13:07:22Z</dc:date>
    </item>
    <item>
      <title>Re: keep SRAM data</title>
      <link>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1778750#M24665</link>
      <description>&lt;P&gt;hi，&lt;/P&gt;&lt;P&gt;thank you reply&lt;/P&gt;&lt;P&gt;and，can you show me some example code？&lt;/P&gt;&lt;P&gt;best wish&lt;/P&gt;&lt;P&gt;oceansea&lt;/P&gt;</description>
      <pubDate>Thu, 21 Dec 2023 13:24:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1778750#M24665</guid>
      <dc:creator>oceansea</dc:creator>
      <dc:date>2023-12-21T13:24:32Z</dc:date>
    </item>
    <item>
      <title>Re: keep SRAM data</title>
      <link>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1780806#M24674</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Not for this case. But you simply do branching on startup in case of SW reset, to either:&lt;/P&gt;&lt;P&gt;1. skip RAM init at all&lt;/P&gt;&lt;P&gt;2. or to exclude RAM init of the certain part which you want to preserve.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;</description>
      <pubDate>Thu, 28 Dec 2023 07:40:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/keep-SRAM-data/m-p/1780806#M24674</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2023-12-28T07:40:11Z</dc:date>
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