Clock Failure in MPC5746C

Sagar10 — Tue, 19 Dec 2023 11:57:31 GMT

What are the possible reasons for a clock failure in the microcontroller, that lead to either of the following scenarios:

CMU_ISR[FLLI] bit or CMU_ISR[FHHI] bit is set.
FIRC measured frequency is out of a prefixed range in software.

Re: Clock Failure in MPC5746C

davidtosenovjan — Wed, 20 Dec 2023 14:34:57 GMT

The frequency of the IRCOSC clock is monitored by the frequency meter in the CMU_0. There is no automated trigger of the FCCU error condition if the IRCOSC fails. Because the IRCOSC is both the boot and the backup clock, the failure is catastrophic.

Each CMU’s FHH and FLL event indicator is connected solely to the FCCU. Therefore, the CMU_0’s connection to the FCCU in the following figure represents all CMU instances.
The period of the IRCOSC can be measured in the CMU0, using the XOSC as a reference. This enables the application trimming of the IRCOSC frequency.

Loosing of IRCOSC clok is considered as rare situation. I am not aware that specific description of the mechanism of the error would be described (probably it is not). In general we could say 'device malfunction' whichever the reason of that would be (operating out of specification whatever way, ESD and so).

topic Re: Clock Failure in MPC5746C in MPC5xxx

Clock Failure in MPC5746C

Re: Clock Failure in MPC5746C