<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic mpc5777c etpu setting in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711074#M24145</link>
    <description>&lt;P&gt;Hi, I have a problem with setting etpu about mpc5777c.&lt;/P&gt;&lt;P&gt;The etpu pin setting for A,B,C about Top and Bottom is gpio 115,116,117,118,119,124.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Etpu pwm made with mcal doesn't come out, so I'm trying to randomly make two pwm master channels and output them, but I'm not sure how to configure them, so I'm asking for help.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 25 Aug 2023 01:42:51 GMT</pubDate>
    <dc:creator>chanu</dc:creator>
    <dc:date>2023-08-25T01:42:51Z</dc:date>
    <item>
      <title>mpc5777c etpu setting</title>
      <link>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711074#M24145</link>
      <description>&lt;P&gt;Hi, I have a problem with setting etpu about mpc5777c.&lt;/P&gt;&lt;P&gt;The etpu pin setting for A,B,C about Top and Bottom is gpio 115,116,117,118,119,124.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Etpu pwm made with mcal doesn't come out, so I'm trying to randomly make two pwm master channels and output them, but I'm not sure how to configure them, so I'm asking for help.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2023 01:42:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711074#M24145</guid>
      <dc:creator>chanu</dc:creator>
      <dc:date>2023-08-25T01:42:51Z</dc:date>
    </item>
    <item>
      <title>Re: mpc5777c etpu setting</title>
      <link>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711287#M24146</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Could you explain the issue more closely? Are you using any configuration tool? Any drivers? Or the code is written by you?&lt;/P&gt;
&lt;P&gt;Which version of SW?&lt;/P&gt;
&lt;P&gt;From the information you have provided I am not able to help you.&lt;/P&gt;
&lt;P&gt;Furthermore the functions of SIU is explained in Chapter 8\ System Integration Unit (SIU, SIU_B) reference manual and its attached IO spreadsheet.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Peter&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2023 07:24:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711287#M24146</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2023-08-25T07:24:52Z</dc:date>
    </item>
    <item>
      <title>Re: mpc5777c etpu setting</title>
      <link>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711315#M24147</link>
      <description>&lt;P&gt;&lt;IMG src="&amp;quot;C:\Users\chanu\OneDrive\바탕 화면\123.png&amp;quot;" border="0" alt="pin setting " width="x" /&gt;&lt;SPAN&gt;The 5777c etpu pin setting is shown in the following figure.&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;As far as I know, a,b,ctop,bottom should act as complementary after allocating one pwm master channel of etpu Think.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;IMG src="&amp;quot;C:\Users\chanu\OneDrive\바탕 화면\dd.png&amp;quot;" border="0" alt="etpu setting" width="x" /&gt;But the pwm output didn't come out, so I arbitrarily modified the code to separate and output top and bottom.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;IMG src="&amp;quot;C:\Users\chanu\OneDrive\바탕 화면\ddddee.png&amp;quot;" border="0" alt="duty output code" width="x" /&gt;I'm trying to output the duty ratio to be deformed for the Vref output, but if I do this, it only comes out to 82V, not 92V.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;So, the conclusion is that when using one PWM master channel and complementary operation, I want to set pwm output and PWM master channel to top and bottom single output, and then set etpu as same as output, so I want to get help.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2023 08:03:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711315#M24147</guid>
      <dc:creator>chanu</dc:creator>
      <dc:date>2023-08-25T08:03:28Z</dc:date>
    </item>
    <item>
      <title>Re: mpc5777c etpu setting</title>
      <link>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711321#M24148</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="123.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238057i52D0CA0C075D6A3C/image-size/large?v=v2&amp;amp;px=999" role="button" title="123.png" alt="123.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="dd.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238056i2CE42A79F74A695E/image-size/large?v=v2&amp;amp;px=999" role="button" title="dd.png" alt="dd.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="ddddee.png" style="width: 788px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238055i5B68FC244CC92EB4/image-size/large?v=v2&amp;amp;px=999" role="button" title="ddddee.png" alt="ddddee.png" /&gt;&lt;/span&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 25 Aug 2023 08:05:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1711321#M24148</guid>
      <dc:creator>chanu</dc:creator>
      <dc:date>2023-08-25T08:05:18Z</dc:date>
    </item>
    <item>
      <title>Re: mpc5777c etpu setting</title>
      <link>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1712829#M24163</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;not sure if you have performed all the steps needed to get the eTPU PWMM funciton up and running. I have noticed one thing in your channel assignment - for phase C your configuration of base and complementary channels is not correct, complementary channel always have to be base channel +1.&amp;nbsp; Here is what you need to configure with examples:&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;1. perform the eTPU PWMM defines in etpu_gct.h:&lt;/STRONG&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;&lt;SPAN&gt;PWMM uses either 4 channels (in case of single channels) or 7 channels in case of complementary channel configuration as shown in the example below. There is a condition that all the PWMM channels master and phases have to be located at the same engine. There is no dedicated channel number for Master channel. For complementary channel configuration there is a restriction that complementary phase pair have to be assigned to consecutive channels.&lt;/SPAN&gt;
&lt;UL&gt;
&lt;LI&gt;&lt;SPAN&gt;Phase X base → eTPU n channel&lt;/SPAN&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;SPAN&gt;Phase X complementary → eTPU n+1 channel&lt;/SPAN&gt;&lt;/LI&gt;
&lt;LI&gt;&lt;SPAN&gt;example configuration:&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_0-1693287163388.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238526iAA711E7AF6D6C74F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_0-1693287163388.png" alt="nxa17216_0-1693287163388.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;ISR and DMA requests configuration – PWMM Master channel is only capable of generation interrupt request – missing update interrupt. This request is generated when no update of input values come before frame and center updated.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_1-1693287270624.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238527i328B0C5B749745C0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_1-1693287270624.png" alt="nxa17216_1-1693287270624.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Enable global variable access - to make the eTPU structures being visible outside the gct files to be accessible from main function:&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_2-1693287594171.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238529i8F7C5915091A7D91/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_2-1693287594171.png" alt="nxa17216_2-1693287594171.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Declare function prototypes:&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_3-1693287645878.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238530i60A04DFEC9EC6AD0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_3-1693287645878.png" alt="nxa17216_3-1693287645878.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;2. perform function configuration in etpu_gct.c&lt;/STRONG&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;include necessary files:&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_4-1693287932031.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238531iC941408E0349E4E6/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_4-1693287932031.png" alt="nxa17216_4-1693287932031.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;&lt;SPAN&gt;Define &lt;STRONG&gt;PWMM instance &lt;/STRONG&gt;structure – use definitions of PWMM channels from &lt;EM&gt;etpu_gct.h &lt;/EM&gt;for particular functionality assignment. Note that only PWMM Master channel and phase base channels have to be defined here, in case of complementery channels are configured the eTPU function presumes the complementary channel to be the &lt;EM&gt;base + 1&lt;/EM&gt;. Configure the priority of the PWMM function, specify the type of the phases (single/complementary pairs) and set the &amp;nbsp;polarity for phases, whereas in case of complementary pairs the polarity can be configured independently for base and complementary channels. Start offset parameter determines the time of first PWMM frame-time after the eTPU time base is enabled. Channel parameter base address &lt;EM&gt;cpba&lt;/EM&gt; can be configured for a particular address within the eTPU data memory or it can be configured as 0 – in that case &lt;EM&gt;cpba&lt;/EM&gt; will be allocated automatically. This parameter determines the address where PWMM channel parameters are stored within eTPU data RAM. &lt;/SPAN&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_5-1693288582833.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238532i3B681B7E3451A785/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_5-1693288582833.png" alt="nxa17216_5-1693288582833.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Define &lt;STRONG&gt;PWMM configuration&lt;/STRONG&gt; structure – use predefined macros to configure intended functionality. All the possible options are listed in etpu_pwmm.h in comments and described in &lt;SPAN&gt;PWMM-doxydoc.chm&lt;/SPAN&gt; file. Parameters of the configuration structure can be changed during runtime and are applied in upcoming PWMM update&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_6-1693288725404.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238534iBB3B9A05F3A67E16/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_6-1693288725404.png" alt="nxa17216_6-1693288725404.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Define &lt;STRONG&gt;PWMM inputs&lt;/STRONG&gt; structure – this structure holds input parameters for phases A, B and C used for update of the generated duty cycles. This structure can remain empty during initialization. Values in this structure will be applied in Frame or in both Center and Frame update – based on update configuration&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_7-1693288889868.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238535i88639F0D4338611F/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_7-1693288889868.png" alt="nxa17216_7-1693288889868.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Define &lt;STRONG&gt;PWMM &lt;/STRONG&gt;&lt;STRONG&gt;states&lt;/STRONG&gt; structure - this structure contains outputs representing internal states of the PWMM function. This structure is not to be initialized. It is used to get information about the PWMM status.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_8-1693289032242.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238536i3863A808555FCA09/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_8-1693289032242.png" alt="nxa17216_8-1693289032242.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;Implement the eTPU initialization function: &lt;STRONG&gt;&lt;SPAN&gt;my_system_etpu_init() &lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;This function consists of 2 parts. The first one is eTPU engine configuration using my_etpu_init structure&lt;/SPAN&gt; – this is already implemented in &lt;EM&gt;etpu_gct.c&lt;/EM&gt; template&lt;SPAN&gt;,&lt;/SPAN&gt; it does not need to be modified. T&lt;SPAN&gt;he second &lt;/SPAN&gt;part&lt;SPAN&gt; configures all eTPU channels &lt;/SPAN&gt;needed by PWMM function &lt;SPAN&gt;using appropriate API calls. For PWMM, the call of &lt;STRONG&gt;fs_etpu_pwmm_init(…)&lt;/STRONG&gt; &lt;/SPAN&gt;defined in &lt;EM&gt;etpu_pwmm.h&lt;/EM&gt; &lt;SPAN&gt;needs to be added&lt;/SPAN&gt;.&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_9-1693289162134.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238537iDD827BDBF872B6DF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_9-1693289162134.png" alt="nxa17216_9-1693289162134.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;3.&amp;nbsp;Get the eTPU PWMM function running by calling the initialization and start routines in the main function. You can then perform the update of the duty cycles by changing pwmm_inputs structure values in endless loop for example (below is just example, adjust that to your application)&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="nxa17216_10-1693290528891.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/238541iB99DA626E7191D79/image-size/medium?v=v2&amp;amp;px=400" role="button" title="nxa17216_10-1693290528891.png" alt="nxa17216_10-1693290528891.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Aug 2023 06:31:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/mpc5777c-etpu-setting/m-p/1712829#M24163</guid>
      <dc:creator>nxa17216</dc:creator>
      <dc:date>2023-08-29T06:31:14Z</dc:date>
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  </channel>
</rss>

