<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>MPC5xxx中的主题 Re: IRQ12</title>
    <link>https://community.nxp.com/t5/MPC5xxx/IRQ12/m-p/486915#M2401</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Do you have set MSR[EE] bit to enable external interrupts?&lt;/P&gt;&lt;P&gt;Do have INTC.CPR.R = 0; to lower current INTC priority to start INTC interrupts?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 26 Feb 2016 07:57:18 GMT</pubDate>
    <dc:creator>davidtosenovjan</dc:creator>
    <dc:date>2016-02-26T07:57:18Z</dc:date>
    <item>
      <title>IRQ12</title>
      <link>https://community.nxp.com/t5/MPC5xxx/IRQ12/m-p/486914#M2400</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have programed, when the Pin of IRQ12 is high, it gives an interrupt. But when the IRQ12 pin goes to high, the flag in SIU_EISR is set, but the MPC5554 goes not&lt;/P&gt;&lt;P&gt;to the ISR. Ihave programed the INTC in SW mode. In the SW table the address of the ISR is set to vector 50. The SIU is programmed as follows.&lt;/P&gt;&lt;P&gt;SIU_PCR138 |=0x0903;&amp;nbsp;&amp;nbsp; // Input buffer enable, weak pull-up&lt;/P&gt;&lt;P&gt;SIU_IREER=0x1000;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // IRQ of rising edge of IRQ12&lt;/P&gt;&lt;P&gt;SIU_DIRER=0x1000;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // request IRQ12&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;What is wrong? Can you help me?&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Horst&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 25 Feb 2016 14:30:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/IRQ12/m-p/486914#M2400</guid>
      <dc:creator>xyxyxyxyxyxyxbb</dc:creator>
      <dc:date>2016-02-25T14:30:28Z</dc:date>
    </item>
    <item>
      <title>Re: IRQ12</title>
      <link>https://community.nxp.com/t5/MPC5xxx/IRQ12/m-p/486915#M2401</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Do you have set MSR[EE] bit to enable external interrupts?&lt;/P&gt;&lt;P&gt;Do have INTC.CPR.R = 0; to lower current INTC priority to start INTC interrupts?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 26 Feb 2016 07:57:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/IRQ12/m-p/486915#M2401</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2016-02-26T07:57:18Z</dc:date>
    </item>
  </channel>
</rss>

