<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: MPC5643L can module Tx in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5643L-can-module-Tx/m-p/484148#M2343</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Selected clocking config could bring an issue. You set the Peripheral set 0 clock to 10Mhz and CAN CPI clock running from FMPLL0 (120Mhz). Note: from Table 10.1 of the device RM the FlexCAN clock should be &amp;lt;= 60MHz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But there are others more important requirements stated in the FlexCAN chapter 24.4.8.5 Arbitration and Matching Timing&lt;/P&gt;&lt;P&gt;• A valid CAN bit timing must be programmed&lt;/P&gt;&lt;P&gt;• The peripheral clock frequency can not be smaller than the CPI clock frequency&lt;/P&gt;&lt;P&gt;• There must be a minimum ratio between the peripheral clock frequency and the CAN bit rate, as specified in Table 24-11&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You do not fulfill the first and second one. Thus I recommend you to increase the Peripheral clock frequency, run the CPI clock from XTAL and recalculate CAN bit timing to reflect XTAL as a source clock and provide valid Bit timing setting.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 17 Mar 2016 05:23:21 GMT</pubDate>
    <dc:creator>PetrS</dc:creator>
    <dc:date>2016-03-17T05:23:21Z</dc:date>
    <item>
      <title>MPC5643L can module Tx</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5643L-can-module-Tx/m-p/484147#M2342</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;hello everyone. I am doing the CAN communication fucntion on the MPC5643L platform and encounter a problem. I set MB[0] of CAN_0 as Tx MailBox and set baud rate equals to 500K. I can receive cam message using CANOE but all the data area are 0 and ID too. This bothered me for some days. I don't know where is wrong. My whole project is in attachment.&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you very much.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-338366"&gt;vcu_5in1.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Mar 2016 02:50:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5643L-can-module-Tx/m-p/484147#M2342</guid>
      <dc:creator>haotianwei1983</dc:creator>
      <dc:date>2016-03-17T02:50:09Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5643L can module Tx</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5643L-can-module-Tx/m-p/484148#M2343</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Selected clocking config could bring an issue. You set the Peripheral set 0 clock to 10Mhz and CAN CPI clock running from FMPLL0 (120Mhz). Note: from Table 10.1 of the device RM the FlexCAN clock should be &amp;lt;= 60MHz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But there are others more important requirements stated in the FlexCAN chapter 24.4.8.5 Arbitration and Matching Timing&lt;/P&gt;&lt;P&gt;• A valid CAN bit timing must be programmed&lt;/P&gt;&lt;P&gt;• The peripheral clock frequency can not be smaller than the CPI clock frequency&lt;/P&gt;&lt;P&gt;• There must be a minimum ratio between the peripheral clock frequency and the CAN bit rate, as specified in Table 24-11&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You do not fulfill the first and second one. Thus I recommend you to increase the Peripheral clock frequency, run the CPI clock from XTAL and recalculate CAN bit timing to reflect XTAL as a source clock and provide valid Bit timing setting.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Mar 2016 05:23:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5643L-can-module-Tx/m-p/484148#M2343</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2016-03-17T05:23:21Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5643L can module Tx</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5643L-can-module-Tx/m-p/484149#M2344</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you. This problem has been solved.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Apr 2016 07:22:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5643L-can-module-Tx/m-p/484149#M2344</guid>
      <dc:creator>haotianwei1983</dc:creator>
      <dc:date>2016-04-01T07:22:30Z</dc:date>
    </item>
  </channel>
</rss>

