https://community.nxp.com/t5/MPC5xxx/MPC5744P/m-p/1635283#M23391 <P><SPAN class="">Now I use MPC5744P chip, how to detect and handle ECC error of Dflash?</SPAN><SPAN class=""> I tried to make ECC in Dflash and Pflash respectively. When ECC is made in Pflash, MEMU module can detect it and will enter IVOR1, but when ECC is made in Dflash, it will not.</SPAN></P> Tue, 18 Apr 2023 09:08:17 GMT Ellison 2023-04-18T09:08:17Z https://community.nxp.com/t5/MPC5xxx/MPC5744P/m-p/1635283#M23391 <P><SPAN class="">Now I use MPC5744P chip, how to detect and handle ECC error of Dflash?</SPAN><SPAN class=""> I tried to make ECC in Dflash and Pflash respectively. When ECC is made in Pflash, MEMU module can detect it and will enter IVOR1, but when ECC is made in Dflash, it will not.</SPAN></P> Tue, 18 Apr 2023 09:08:17 GMT https://community.nxp.com/t5/MPC5xxx/MPC5744P/m-p/1635283#M23391 Ellison 2023-04-18T09:08:17Z https://community.nxp.com/t5/MPC5xxx/MPC5744P/m-p/1636236#M23397 <P>ECC event reporting on data flash accesses is disabled. On multi-bit ECC event, the corrupted read data is replaced with a fixed, ECC-clean illegal opcode value (on this device 0xFFFF_FFFF).</P> <P>Pay attention to following appnote, section 3.4.2:</P> <P><A href="https://www.nxp.com/docs/en/application-note/AN13179.pdf" target="_blank">https://www.nxp.com/docs/en/application-note/AN13179.pdf</A></P> <P>&nbsp;</P> <P>Even though 0xFFFF_FFFF is returned value, the ECC error will be caught in flash registers, so user can check whether read value is 0xFFFF_FFFF or it is ECC multibit error.</P> Wed, 19 Apr 2023 11:49:19 GMT https://community.nxp.com/t5/MPC5xxx/MPC5744P/m-p/1636236#M23397 davidtosenovjan 2023-04-19T11:49:19Z