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    <title>MPC5xxx中的主题 Re: Memory Protection Unit</title>
    <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616015#M23192</link>
    <description>&lt;P&gt;The basic idea is following: you will configure two descriptors covering the same region. You will also enable the PID in both descriptors, so these descriptors are not considered as overlapping because also PID will be used to check if there's a hit or not. So, you can configure access rights for each process ID separately. &lt;/P&gt;
&lt;P&gt;There's Process ID register in the core which is used to check if there's a hit or not. Your SW just writes this register as needed.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1678902000580.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/214777i4A1CD3FA4ACF2E97/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1678902000580.png" alt="lukaszadrapa_0-1678902000580.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Now let's say we have descriptor X and descriptor Y covering the same area.&lt;/P&gt;
&lt;P&gt;Descriptor X is configured for PID 3 and descriptor Y for PID 4.&lt;/P&gt;
&lt;P&gt;Default value of PID (for main task) is 0.&lt;/P&gt;
&lt;P&gt;How to use it with tasks:&lt;/P&gt;
&lt;P&gt;void task1(void) /* covered by descriptor(s) X */&lt;/P&gt;
&lt;P&gt;{&lt;/P&gt;
&lt;P&gt;// Set Process ID 3&lt;BR /&gt;__MTSPR(SPR_PID,3);&lt;/P&gt;
&lt;P&gt;/*&amp;nbsp; run your code */&lt;/P&gt;
&lt;P&gt;// Set Process ID back to 0&lt;BR /&gt;__MTSPR(SPR_PID,0);&lt;/P&gt;
&lt;P&gt;}&lt;/P&gt;
&lt;P&gt;void task2(void) /* covered by descriptor(s) Y */&lt;/P&gt;
&lt;P&gt;{&lt;/P&gt;
&lt;P&gt;// Set Process ID 4&lt;BR /&gt;__MTSPR(SPR_PID,4);&lt;/P&gt;
&lt;P&gt;/*&amp;nbsp; run your code */&lt;/P&gt;
&lt;P&gt;// Set Process ID back to 0&lt;BR /&gt;__MTSPR(SPR_PID,0);&lt;/P&gt;
&lt;P&gt;}&lt;/P&gt;
&lt;P&gt;I'm not really sure if this can be implemented to MBDT, please ask here:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/bd-p/mbdt" target="_blank"&gt;https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/bd-p/mbdt&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
    <pubDate>Wed, 15 Mar 2023 17:49:18 GMT</pubDate>
    <dc:creator>lukaszadrapa</dc:creator>
    <dc:date>2023-03-15T17:49:18Z</dc:date>
    <item>
      <title>Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1613457#M23101</link>
      <description>&lt;P&gt;Hello, please! I want to know more about how to configure the memory protection unit for MPC5744P&lt;BR /&gt;and I need to know how to use this configurator.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Core-MPU-configurator/ta-p/1100529" target="_blank" rel="noopener"&gt;(1) Core MPU configurator - NXP Community&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 12 Mar 2023 07:31:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1613457#M23101</guid>
      <dc:creator>Mennazz</dc:creator>
      <dc:date>2023-03-12T07:31:33Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1613786#M23111</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/213901"&gt;@Mennazz&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;please take a look at:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/MPC5xxx/What-is-the-difference-between-the-SMPU-and-MPU-in-MPC5744P/m-p/1064176/highlight/true#M15994" target="_blank"&gt;https://community.nxp.com/t5/MPC5xxx/What-is-the-difference-between-the-SMPU-and-MPU-in-MPC5744P/m-p/1064176/highlight/true#M15994&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;There's also link to SW example for MPC5744P.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Mon, 13 Mar 2023 07:42:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1613786#M23111</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2023-03-13T07:42:07Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1614979#M23155</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Do you know if it is possible to configure a specific memory location for each application?&lt;/P&gt;&lt;P&gt;For example, if I have 2 tasks, I want&lt;/P&gt;&lt;P&gt;task1: has read access to region 1&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;-&amp;gt; has a read / write access to region2&amp;nbsp;&lt;/P&gt;&lt;P&gt;Task2: "has read/write access to region 1"&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;-&amp;gt; has read access for region 2&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in advance&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 14 Mar 2023 12:51:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1614979#M23155</guid>
      <dc:creator>Mennazz</dc:creator>
      <dc:date>2023-03-14T12:51:53Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1615839#M23185</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/213901"&gt;@Mennazz&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;yes, that's possible. There's TID (Task identifier) which is compared with current PID (Process identifier) which is a core register configured by user. See core reference manual for more details (just search for TID keyword):&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=E200Z4RM&amp;amp;location=null" target="_blank"&gt;https://www.nxp.com/webapp/Download?colCode=E200Z4RM&amp;amp;location=null&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Unfortunately this is general e200z4 RM only, there's also e200z425 variant used on MPC5744P. This is not available on our web page. If needed, I can provide this one under NDA. In this case, submit a ticket here:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://support.nxp.com/s/?language=en_US" target="_blank"&gt;https://support.nxp.com/s/?language=en_US&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;You can configure the descriptors using this tool:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Core-MPU-configurator/ta-p/1100529" target="_blank"&gt;https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Core-MPU-configurator/ta-p/1100529&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;And you can do the same when using SMPU (System MPU) which sits on crossbar. Here is an example for MPC5748G. This should help to understand how it works:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5748G-SMPU-initialization-Process-ID-test-GHS614/ta-p/1104607" target="_blank"&gt;https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5748G-SMPU-initialization-Process-ID-test-GHS614/ta-p/1104607&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 14:23:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1615839#M23185</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2023-03-15T14:23:58Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1615874#M23189</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you tell me more about how to set the TID for every application and the PID&amp;nbsp; with SMPU for every region, as it is not clear in the example you sent?&lt;/P&gt;&lt;P&gt;And could you tell me whether it can be done using your MBD toolbox ?&lt;/P&gt;&lt;P&gt;Thanks in advance&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 15:11:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1615874#M23189</guid>
      <dc:creator>Mennazz</dc:creator>
      <dc:date>2023-03-15T15:11:01Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616015#M23192</link>
      <description>&lt;P&gt;The basic idea is following: you will configure two descriptors covering the same region. You will also enable the PID in both descriptors, so these descriptors are not considered as overlapping because also PID will be used to check if there's a hit or not. So, you can configure access rights for each process ID separately. &lt;/P&gt;
&lt;P&gt;There's Process ID register in the core which is used to check if there's a hit or not. Your SW just writes this register as needed.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1678902000580.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/214777i4A1CD3FA4ACF2E97/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1678902000580.png" alt="lukaszadrapa_0-1678902000580.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Now let's say we have descriptor X and descriptor Y covering the same area.&lt;/P&gt;
&lt;P&gt;Descriptor X is configured for PID 3 and descriptor Y for PID 4.&lt;/P&gt;
&lt;P&gt;Default value of PID (for main task) is 0.&lt;/P&gt;
&lt;P&gt;How to use it with tasks:&lt;/P&gt;
&lt;P&gt;void task1(void) /* covered by descriptor(s) X */&lt;/P&gt;
&lt;P&gt;{&lt;/P&gt;
&lt;P&gt;// Set Process ID 3&lt;BR /&gt;__MTSPR(SPR_PID,3);&lt;/P&gt;
&lt;P&gt;/*&amp;nbsp; run your code */&lt;/P&gt;
&lt;P&gt;// Set Process ID back to 0&lt;BR /&gt;__MTSPR(SPR_PID,0);&lt;/P&gt;
&lt;P&gt;}&lt;/P&gt;
&lt;P&gt;void task2(void) /* covered by descriptor(s) Y */&lt;/P&gt;
&lt;P&gt;{&lt;/P&gt;
&lt;P&gt;// Set Process ID 4&lt;BR /&gt;__MTSPR(SPR_PID,4);&lt;/P&gt;
&lt;P&gt;/*&amp;nbsp; run your code */&lt;/P&gt;
&lt;P&gt;// Set Process ID back to 0&lt;BR /&gt;__MTSPR(SPR_PID,0);&lt;/P&gt;
&lt;P&gt;}&lt;/P&gt;
&lt;P&gt;I'm not really sure if this can be implemented to MBDT, please ask here:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/bd-p/mbdt" target="_blank"&gt;https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/bd-p/mbdt&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 17:49:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616015#M23192</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2023-03-15T17:49:18Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616171#M23195</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I nearly got it. You gave me an example of how to set a PID for each memory region, right?&amp;nbsp;&lt;BR /&gt;Now my question is how to give each application or task a specific ID so that it only accesses its own specific region.&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
      <pubDate>Wed, 15 Mar 2023 20:28:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616171#M23195</guid>
      <dc:creator>Mennazz</dc:creator>
      <dc:date>2023-03-15T20:28:27Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616432#M23198</link>
      <description>&lt;P&gt;That's what I wrote last time:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="lukaszadrapa_0-1678946730470.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/214856iE0ABE1310BF0DE36/image-size/medium?v=v2&amp;amp;px=400" role="button" title="lukaszadrapa_0-1678946730470.png" alt="lukaszadrapa_0-1678946730470.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Those are writes to the core register PID. This value is then compared with PID defined in MPU descriptor.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Lukas&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 16 Mar 2023 06:06:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616432#M23198</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2023-03-16T06:06:38Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616948#M23206</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for your effort&amp;nbsp;&lt;BR /&gt;I have one more question. I cannot find this register in the MPC5744P document, so could you tell me more about it,&amp;nbsp; explain it in details, and tell me where I can find it since when I put it into my code it encounters an error?&lt;/P&gt;&lt;P&gt;Thanks in advance&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Mennazz_0-1678980877524.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/215041i736E3BE0F85BE133/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Mennazz_0-1678980877524.png" alt="Mennazz_0-1678980877524.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 16 Mar 2023 15:34:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1616948#M23206</guid>
      <dc:creator>Mennazz</dc:creator>
      <dc:date>2023-03-16T15:34:46Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1617376#M23214</link>
      <description>&lt;P&gt;That's core register described in the core reference manual:&lt;BR /&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=E200Z4RM&amp;amp;location=null" target="_blank"&gt;https://www.nxp.com/webapp/Download?colCode=E200Z4RM&amp;amp;location=null&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Because it's core register, it's not memory mapped and it can be accessed only via asm instructions mtspr and mfspr. &lt;BR /&gt;Take a look at this post how to access it in C:&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/S32-Design-Studio/Read-PowerPC-Machine-State-Register-from-C/m-p/1600226/highlight/true#M9748" target="_blank"&gt;https://community.nxp.com/t5/S32-Design-Studio/Read-PowerPC-Machine-State-Register-from-C/m-p/1600226/highlight/true#M9748&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;And notice that SPR number of PID register is 48.&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Lukas&lt;/P&gt;</description>
      <pubDate>Fri, 17 Mar 2023 06:42:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1617376#M23214</guid>
      <dc:creator>lukaszadrapa</dc:creator>
      <dc:date>2023-03-17T06:42:58Z</dc:date>
    </item>
    <item>
      <title>Re: Memory Protection Unit</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1617988#M23225</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37795"&gt;@lukaszadrapa&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It works thanks for your support&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sun, 19 Mar 2023 07:52:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Memory-Protection-Unit/m-p/1617988#M23225</guid>
      <dc:creator>Mennazz</dc:creator>
      <dc:date>2023-03-19T07:52:15Z</dc:date>
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