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    <title>topic Re: MPC5777C Checker Core Control in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1598071#M22852</link>
    <description>&lt;P&gt;Such situation cannot happen. Checker core cannot work independently of Core 1.&lt;/P&gt;</description>
    <pubDate>Mon, 13 Feb 2023 09:31:10 GMT</pubDate>
    <dc:creator>davidtosenovjan</dc:creator>
    <dc:date>2023-02-13T09:31:10Z</dc:date>
    <item>
      <title>MPC5777C Checker Core Control</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1593732#M22790</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am working with&amp;nbsp;MPC5777C. I have a question about core 2(checker core).&lt;/P&gt;&lt;P&gt;I am using only core 0 in my application. I am not using Core 1. I control the involuntary opening of Core 2 by looking at the SIU-RSTVEC1 register.&lt;BR /&gt;I want to prevent Core 2(Checker Core) from opening unintentionally as well. How can I do that.&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
      <pubDate>Mon, 06 Feb 2023 07:46:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1593732#M22790</guid>
      <dc:creator>tapur</dc:creator>
      <dc:date>2023-02-06T07:46:49Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C Checker Core Control</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1593965#M22795</link>
      <description>&lt;P&gt;This MCU does not have Protection Module so apparently the only option is to use Memory Protection Unit.&lt;/P&gt;
&lt;P&gt;Granularity of protected area is 32 Byte, so you cannot protect registers one by one. In this case it would be this register set:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="davidtosenovjan_0-1675687812239.png" style="width: 231px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/209732i180899EA8551470D/image-dimensions/231x286?v=v2" width="231" height="286" role="button" title="davidtosenovjan_0-1675687812239.png" alt="davidtosenovjan_0-1675687812239.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;davidtosenovjan_0-1675687812239.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Question is whether this is acceptable for your application.&lt;/P&gt;
&lt;P&gt;Checker core is disabled/according LOCKSTEP configuration in DCF record, it is not is being started by software write as SIU_LOCKSTEP.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 06 Feb 2023 13:07:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1593965#M22795</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2023-02-06T13:07:00Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C Checker Core Control</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1597900#M22850</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/52613"&gt;@davidtosenovjan&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Assume core 1 is configured as disable at the start of project, i.e., it kept in reset state.&amp;nbsp;If checker core works unwantedly, when core 1 is disabled, what kind of faults may arise in the system?&lt;/P&gt;&lt;P&gt;Thanks in advance.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 13 Feb 2023 08:10:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1597900#M22850</guid>
      <dc:creator>tapur</dc:creator>
      <dc:date>2023-02-13T08:10:21Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C Checker Core Control</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1598071#M22852</link>
      <description>&lt;P&gt;Such situation cannot happen. Checker core cannot work independently of Core 1.&lt;/P&gt;</description>
      <pubDate>Mon, 13 Feb 2023 09:31:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-Checker-Core-Control/m-p/1598071#M22852</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2023-02-13T09:31:10Z</dc:date>
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