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    <title>topic Re: MPC5748G_I2C module in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481287#M2264</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Petr,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot.&lt;/P&gt;&lt;P&gt;Do you have some I2C module examples of transfering data?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Qiang&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 05 May 2016 02:28:46 GMT</pubDate>
    <dc:creator>huqiang</dc:creator>
    <dc:date>2016-05-05T02:28:46Z</dc:date>
    <item>
      <title>MPC5748G_I2C module</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481283#M2260</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="font-size: 14px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt; When I initial the I2C module, I run the program step by step, observe the I2C registers.&lt;/P&gt;&lt;P style="font-size: 14px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I notice that the "I2C_2.IBCR.B.MSSL" bit is always 0 and "I2C_2.IBDR.R" is also always 0.&lt;/P&gt;&lt;P style="font-size: 14px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; When I run the code "I2C_2.IBCR.B.MSSL = 1;", why will bit "I2C_2.IBSR.B.IBIF" and "I2C_2.IBSR.B.IBAL" turn to 1? instead of bit ""I2C_2.IBCR.B.MSSL" turn to 1?&lt;/P&gt;&lt;P style="font-size: 14px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Is it that I cannnot select master mode, so I cannot set the "I2C_2.IBDR.R"?&lt;/P&gt;&lt;P style="min- padding: 0px; font-size: 14px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px; font-size: 14px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; color: #51626f;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;void I2C_2_Init(void)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // I2C Bus Frequency Divider Register (I2C_IBFD)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2C_2.IBFD.B.IBC = 0x20; // Division ratio to obtain SCL frequency from Platform clock/2.&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // I2C Bus Control Register (I2C_IBCR)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2C_2.IBCR.B.MDIS = 0; // Enable I2C module&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2C_2.IBCR.B.IBIE = 1; // Interrupts from the I2C Bus module are enabled&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2C_2.IBCR.B.TXRX = 1; // Transmit Mode&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Start I2C master mode transmit&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2C_2.IBCR.B.MSSL = 1; // Master Mode - When this bit is changed from 0 to 1, a START signal is generated on the bus and the master mode is selected&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2C_2.IBSR.B.IBIF = 0; // I-Bus Interrupt Flag&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2C_2.IBDR.R = 0x55; // Sent out 0x55&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Observe changes in IBSR[TCF]&lt;/P&gt;&lt;P&gt;//&amp;nbsp;&amp;nbsp;&amp;nbsp; while (I2C_0.IBSR.B.TCF == 0);&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //Wait until IBSR[IBIF] = 1.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(I2C_2.IBSR.B.IBIF == 0);&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2C_2.IBCR.B.MSSL = 0;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Generate stop signal;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-338394"&gt;I2C_Z4_1.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Apr 2016 01:44:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481283#M2260</guid>
      <dc:creator>huqiang</dc:creator>
      <dc:date>2016-04-27T01:44:09Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5748G_I2C module</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481284#M2261</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Seems to me that you can use only I2C_0 as master.&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Apr 2016 08:42:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481284#M2261</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2016-04-28T08:42:40Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5748G_I2C module</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481285#M2262</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you. I've tried to use I2C_0 as master, it worked successfully.&lt;/P&gt;&lt;P&gt;Can I use other I2C_x as master? How to code?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 28 Apr 2016 14:04:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481285#M2262</guid>
      <dc:creator>huqiang</dc:creator>
      <dc:date>2016-04-28T14:04:20Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5748G_I2C module</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481286#M2263</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;All I2C modules can work as master. You have to configure pads properly.&lt;/P&gt;&lt;P&gt;Both pins, SDA and SCL, must be configured to enable output buffer, select open-drain function, enable input buffer, select intenal pull ups if there are no external one.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This config can be used:&lt;/P&gt;&lt;P&gt;SIUL2.MSCR[73].R = 0x23880002;&amp;nbsp; //PE[9] - I2C_2 SCL&lt;/P&gt;&lt;P&gt;SIUL2.IMCR[781-512].R = 1;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SIUL2.MSCR[72].R = 0x23880004;&amp;nbsp; //PE[8] - I2C_2 SDA&lt;/P&gt;&lt;P&gt;SIUL2.IMCR[782-512].R = 1;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 29 Apr 2016 11:45:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481286#M2263</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2016-04-29T11:45:51Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5748G_I2C module</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481287#M2264</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Petr,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks a lot.&lt;/P&gt;&lt;P&gt;Do you have some I2C module examples of transfering data?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Qiang&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 May 2016 02:28:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5748G-I2C-module/m-p/481287#M2264</guid>
      <dc:creator>huqiang</dc:creator>
      <dc:date>2016-05-05T02:28:46Z</dc:date>
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