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    <title>topic Re: how to enable interrupt for flexray in 5748g in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/1544044#M22238</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;does any body has an solution for that problem.&lt;/P&gt;&lt;P&gt;Is see the FAFAIF Bit in GIFER , but the service routine will not be called.&amp;nbsp; &lt;LI-EMOJI id="lia_disappointed-face" title=":disappointed_face:"&gt;&lt;/LI-EMOJI&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 26 Oct 2022 11:55:13 GMT</pubDate>
    <dc:creator>ulfschlieben</dc:creator>
    <dc:date>2022-10-26T11:55:13Z</dc:date>
    <item>
      <title>how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625119#M5637</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;I would like to enable interrupts for flexray using MPC5748g and XPC56XX EVB.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;So I set the interrupt priority and core as below, but it is not working well.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Would you please check those values are correct or not?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[462].B.PRC_SELN = 0x8; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[462].B.PRIN =1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[461].B.PRC_SELN = 0x8; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[461].B.PRIN =1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[402].B.PRC_SELN = 0x8; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[460].B.PRIN =1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[459].B.PRC_SELN = 0x8; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[459].B.PRIN =1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[458].B.PRC_SELN = 0x8; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[458].B.PRIN =1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[457].B.PRC_SELN = 0x8; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[457].B.PRIN =1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[456].B.PRC_SELN = 0x8; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[456].B.PRIN =1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[455].B.PRC_SELN = 0x8; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;INTC.PSR[455].B.PRIN =1;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Boyoung.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 Nov 2016 07:29:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625119#M5637</guid>
      <dc:creator>boyoungmun</dc:creator>
      <dc:date>2016-11-28T07:29:10Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625120#M5638</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Boyoung,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;your code is correct. Interrupt requests are sent to z4a core.&amp;nbsp; Check, if you have set EE bit in MSR register.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did you place the interrupt handlers at correct addresses? Do you see that interrupt flags are set correct?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Martin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 29 Nov 2016 11:37:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625120#M5638</guid>
      <dc:creator>martin_kovar</dc:creator>
      <dc:date>2016-11-29T11:37:09Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625121#M5639</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Hi Martin,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I added the interrupts handlers in IntcIsrVectorTable[], please see the below codes.&lt;/SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(uint32_t) &amp;amp;FLEXRAY_ISR, /* Vector # 455 FlexRay_0_2 FNEAIF */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(uint32_t) &amp;amp;FLEXRAY_ISR, /* Vector # 456 FlexRay_0_3 FNEBIF */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(uint32_t) &amp;amp;FLEXRAY_ISR, /* Vector # 457 FlexRay_0_4 WUPIF */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(uint32_t) &amp;amp;FLEXRAY_ISR, /* Vector # 458 FlexRay_0_5 PRIF */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(uint32_t) &amp;amp;FLEXRAY_ISR, /* Vector # 459 FlexRay_0_6 CHIF */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(uint32_t) &amp;amp;FLEXRAY_ISR, /* Vector # 460 FlexRay_0_7 TBIF */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(uint32_t) &amp;amp;FLEXRAY_ISR, /* Vector # 461 FlexRay_0_8 RBIF */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;(uint32_t) &amp;amp;FLEXRAY_ISR, /* Vector # 462 FlexRay_0_9 MIF */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;And set the interrupts flags in Fr_GIFER register and Fr_PIER0 register.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But I couldn’t find the MSR register in S32DS so didn’t check the EE value was set to 1 or not.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Would you please let me know how to check and set EE bit in MSR register using S32DS?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Boyoung.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 30 Nov 2016 00:21:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625121#M5639</guid>
      <dc:creator>boyoungmun</dc:creator>
      <dc:date>2016-11-30T00:21:41Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625122#M5640</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Boyoung,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;implementation of register view is not so good in S32 Design Studio. Please look at the figure below.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/11109iE73292E06349DF0B/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;There is not description of single bits in msr register. You have to open code reference manual for e200z4 and compare the value with MSR register description.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/11211iE021C1ACAA179794/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have you enabled appropriate interrupts in FR_GIFER register?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you see that appropriate interrupt flags in FR_CIFR are set?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Martin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 30 Nov 2016 14:34:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625122#M5640</guid>
      <dc:creator>martin_kovar</dc:creator>
      <dc:date>2016-11-30T14:34:55Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625123#M5641</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Whenever I try to set &lt;/SPAN&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;PRIE, FAFAIE, RBIE and TBIE to 1 in Fr_GIFER, error (&lt;/SPAN&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;“&lt;/SPAN&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;No source available for "main() at main_Z4_0.c:286 0x100af42") is returned.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 9.0pt;"&gt;Do I need to set the additional register or setting?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 16 Dec 2016 05:42:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625123#M5641</guid>
      <dc:creator>boyoungmun</dc:creator>
      <dc:date>2016-12-16T05:42:55Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625124#M5642</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;have you correctly placed interrupt handler routines in intc_SW_mode_isr_vectors_MPC5748G.c file?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Martin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 20 Dec 2016 16:40:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/625124#M5642</guid>
      <dc:creator>martin_kovar</dc:creator>
      <dc:date>2016-12-20T16:40:10Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/1544044#M22238</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;does any body has an solution for that problem.&lt;/P&gt;&lt;P&gt;Is see the FAFAIF Bit in GIFER , but the service routine will not be called.&amp;nbsp; &lt;LI-EMOJI id="lia_disappointed-face" title=":disappointed_face:"&gt;&lt;/LI-EMOJI&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 26 Oct 2022 11:55:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/1544044#M22238</guid>
      <dc:creator>ulfschlieben</dc:creator>
      <dc:date>2022-10-26T11:55:13Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/1544165#M22242</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;INterrupt Handler Adress is correct an&amp;nbsp; I also see the flags cumming up correct in the felex ray registers.&lt;/P&gt;&lt;P&gt;But the MSR[EE] is not set....&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 26 Oct 2022 15:36:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/1544165#M22242</guid>
      <dc:creator>ulfschlieben</dc:creator>
      <dc:date>2022-10-26T15:36:34Z</dc:date>
    </item>
    <item>
      <title>Re: how to enable interrupt for flexray in 5748g</title>
      <link>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/1544932#M22248</link>
      <description>&lt;P&gt;Hi Martin,&lt;/P&gt;&lt;P&gt;I was to dump to interpret the register correct. &lt;LI-EMOJI id="lia_disappointed-face" title=":disappointed_face:"&gt;&lt;/LI-EMOJI&gt;&lt;/P&gt;&lt;P&gt;So MSR = 0x9000 --&amp;gt; ee is enabled&lt;/P&gt;&lt;P&gt;When I start the sw first time I got one Interrupt from the FIFO --&amp;gt; good&lt;/P&gt;&lt;P&gt;Then I clear the FR_GIFER[FAFAIF] bit&lt;/P&gt;&lt;P&gt;But from know I didn't get any new FIFO Int&lt;/P&gt;&lt;P&gt;Any Idea what I'm missing&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 27 Oct 2022 09:32:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/how-to-enable-interrupt-for-flexray-in-5748g/m-p/1544932#M22248</guid>
      <dc:creator>ulfschlieben</dc:creator>
      <dc:date>2022-10-27T09:32:31Z</dc:date>
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