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    <title>topic Re: Initialisation of SIPI/LFAST on MPC5777C in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/Initialisation-of-SIPI-LFAST-on-MPC5777C/m-p/1349871#M19288</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;I've asked application to have&amp;nbsp; a look at this, here is the feedback:&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;In the code for SPC5777C which I have is different settings for TX pads.&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;SIU.PCR[208].R = 0x1204;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;SIU.PCR[209].R = 0x1204;&lt;/EM&gt;&lt;/P&gt;
&lt;P style="margin: 0px;"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;and also slave CLK output: SIU.PCR[210].R = 0x1204;&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Peter&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt; &lt;/LI-WRAPPER&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 04 Oct 2021 05:54:22 GMT</pubDate>
    <dc:creator>petervlna</dc:creator>
    <dc:date>2021-10-04T05:54:22Z</dc:date>
    <item>
      <title>Initialisation of SIPI/LFAST on MPC5777C</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Initialisation-of-SIPI-LFAST-on-MPC5777C/m-p/1348484#M19279</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am trying to implement SIPI for the communication between two MPC5777Cs.&lt;/P&gt;&lt;P&gt;Is there a software example for SIPI/LFAST on the MPC5777C available?&lt;/P&gt;&lt;P&gt;I have the example software of AN5134 but have problems adapting the LFAST setup (GPIOs + initialisation) to the MPC5777C as the slave is unable to receive ICLC messages from the master.&lt;/P&gt;&lt;H3&gt;Details:&lt;/H3&gt;&lt;P&gt;Previously I had implemented Zipwire for a pair of MPC5777M EVBs using the software example of AN5134. I re-used the LFAST initialisation procedure for the MPC5777C, changing only the pin definitions and the PLL frequency divider (due to the lower data rate as described by errata ERR007511).&lt;/P&gt;&lt;P&gt;The pins are defined as following:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Both:&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;SIU.PCR[212].R = 0x1100; //RX_P PIN: PA = 0xb100 (Alternate 3), IBE = 1
SIU.PCR[213].R = 0x1100; //RX_N PIN: PA = 0xb100 (Alternate 3), IBE = 1
SIU.PCR[208].R = 0x12C0; //TX_P PIN: PA = 0xb100 (Alternate 3), OBE = 1, DSC = 0b11 (maximum driver strength)
SIU.PCR[209].R = 0x12C0; //TX_N PIN: PA = 0xb100 (Alternate 3), OBE = 1, DSC = 0b11 (maximum driver strength)&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;LFAST-master:&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;SIU.PCR[210].R = 0x1100;  //SIPI_REFCLK input&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;LFAST-slave:&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;SIU.PCR[210].R = 0x1200;  //SIPI_REFCLK pin is enabled.  Enable output buffer and assign pad to SIPI_REFCLK function (20 MHz).&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The problem is that the LFAST-slave does not receive the ICLC-Command to enable the Tx interface. The data is sent by the LFAST-master however as seen using an oscilloscope (only the TX_P signal of the master is shown):&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="rxp_slave_iclc0x31.jpg" style="width: 640px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/157995iBC3E294607829A85/image-size/large?v=v2&amp;amp;px=999" role="button" title="rxp_slave_iclc0x31.jpg" alt="rxp_slave_iclc0x31.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;The LFAST synchronisation pattern and the ICLC-Payload (0x31) can be recognized. The slave shows no reaction to the packet however and the corresponding interrupt pending bit (RIISR_ICTEF) is not asserted.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Bernd&lt;/P&gt;</description>
      <pubDate>Thu, 30 Sep 2021 11:52:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Initialisation-of-SIPI-LFAST-on-MPC5777C/m-p/1348484#M19279</guid>
      <dc:creator>BG</dc:creator>
      <dc:date>2021-09-30T11:52:54Z</dc:date>
    </item>
    <item>
      <title>Re: Initialisation of SIPI/LFAST on MPC5777C</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Initialisation-of-SIPI-LFAST-on-MPC5777C/m-p/1349871#M19288</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;I've asked application to have&amp;nbsp; a look at this, here is the feedback:&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;In the code for SPC5777C which I have is different settings for TX pads.&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;SIU.PCR[208].R = 0x1204;&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;SIU.PCR[209].R = 0x1204;&lt;/EM&gt;&lt;/P&gt;
&lt;P style="margin: 0px;"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;EM&gt;and also slave CLK output: SIU.PCR[210].R = 0x1204;&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Peter&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;LI-WRAPPER&gt; &lt;/LI-WRAPPER&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 04 Oct 2021 05:54:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Initialisation-of-SIPI-LFAST-on-MPC5777C/m-p/1349871#M19288</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2021-10-04T05:54:22Z</dc:date>
    </item>
    <item>
      <title>Re: Initialisation of SIPI/LFAST on MPC5777C</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Initialisation-of-SIPI-LFAST-on-MPC5777C/m-p/1349885#M19289</link>
      <description>&lt;P&gt;Hello Peter,&lt;/P&gt;&lt;P&gt;Thank you, those pin settings fixed the problem!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Bernd&lt;/P&gt;</description>
      <pubDate>Mon, 04 Oct 2021 06:48:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Initialisation-of-SIPI-LFAST-on-MPC5777C/m-p/1349885#M19289</guid>
      <dc:creator>BG</dc:creator>
      <dc:date>2021-10-04T06:48:57Z</dc:date>
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