https://community.nxp.com/t5/MPC5xxx/To-Trigger-Command-Data-Flow-from-CQueey-to-CFIFO/m-p/1301646#M18583 <P>According you previous threads I suppose this question is related to MPC5777C's eQADC.<BR /><BR />We have 3 stages of buffering for eQADC commands:<BR />1) CQueue in system memory<BR />2) CFIFO in local module’s memory and<BR />3) CBuffer in local module’s memory as well<BR />Transfers between 1 and 2 are under control of DMA (triggered when 2 is not full) or Core (thus triggered software way).<BR />Transfers between 2 and 3 are under control of eQADC itself (and are triggered according to CFIFO operation mode)!<BR />When commands are already present in CBuffer, they are immediately performed in sequence with ADC clock tick, there is no other triggering. If one command lies in CBuffer0 and second in CBuffer1, they will be converted simultaneously.<BR /><BR />To answer your question - For CFIFO command moving don't use any timer. It is is needed to use 'CFIFO is not full' flag EQADC_FISRn[CFFFX], either by SW polling/interrupt or by eDMA (channels 0-11).</P> <P>&nbsp;</P> Fri, 02 Jul 2021 08:14:33 GMT davidtosenovjan 2021-07-02T08:14:33Z https://community.nxp.com/t5/MPC5xxx/To-Trigger-Command-Data-Flow-from-CQueey-to-CFIFO/m-p/1299678#M18571 <P>Hello everyone,</P><P>Can I set a timer for commands to move from CQueue to CFIFO? If I can, which register should ı use to select hardware trigger for this aim?</P><P>&nbsp;</P><P>&nbsp;</P> Tue, 29 Jun 2021 12:05:40 GMT https://community.nxp.com/t5/MPC5xxx/To-Trigger-Command-Data-Flow-from-CQueey-to-CFIFO/m-p/1299678#M18571 berat24 2021-06-29T12:05:40Z https://community.nxp.com/t5/MPC5xxx/To-Trigger-Command-Data-Flow-from-CQueey-to-CFIFO/m-p/1301646#M18583 <P>According you previous threads I suppose this question is related to MPC5777C's eQADC.<BR /><BR />We have 3 stages of buffering for eQADC commands:<BR />1) CQueue in system memory<BR />2) CFIFO in local module’s memory and<BR />3) CBuffer in local module’s memory as well<BR />Transfers between 1 and 2 are under control of DMA (triggered when 2 is not full) or Core (thus triggered software way).<BR />Transfers between 2 and 3 are under control of eQADC itself (and are triggered according to CFIFO operation mode)!<BR />When commands are already present in CBuffer, they are immediately performed in sequence with ADC clock tick, there is no other triggering. If one command lies in CBuffer0 and second in CBuffer1, they will be converted simultaneously.<BR /><BR />To answer your question - For CFIFO command moving don't use any timer. It is is needed to use 'CFIFO is not full' flag EQADC_FISRn[CFFFX], either by SW polling/interrupt or by eDMA (channels 0-11).</P> <P>&nbsp;</P> Fri, 02 Jul 2021 08:14:33 GMT https://community.nxp.com/t5/MPC5xxx/To-Trigger-Command-Data-Flow-from-CQueey-to-CFIFO/m-p/1301646#M18583 davidtosenovjan 2021-07-02T08:14:33Z