topic Re: MPC5748G PWM in MPC5xxx

MPC5748G PWM

sohyunjang — Mon, 12 Aug 2019 07:52:01 GMT

Hi, I use MPC5748G PWM.

I have referred to the Cookbook below.

AN4830 (https://www.nxp.com/docs/en/application-note/AN4830.pdf)

And I changed the PWM channel.

PG[2] ->PE[13]

void emios1_ch23_MCB(void) { /* Config emios 1 chan 23: MCB, 1K count */

eMIOS_UC_1.UC[23].C.R = 0x0; /* Disable channel prescaler (reset default) */
eMIOS_UC_1.UC[23].A.R = 1000; /* MCB mode: period will be 1K clocks */
eMIOS_UC_1.UC[23].C.B.MODE = 0x50; /* Modulus Counter Buffered (Up ctr) */
eMIOS_UC_1.UC[23].C.B.UCPRE = 0; /* Prescale channel clock by 0+1=1 */
eMIOS_UC_1.UC[23].C.B.UCPREN= 1; /* Enable prescaler */
}

void emios1_ch11_OPWMB(void) { /* Config emios 1 chan 1: OPWMB */

eMIOS_UC_1.UC[20].C.R = 0x0; /* Disable channel prescaler (reset default) */
eMIOS_UC_1.UC[20].A.R = 250; /* PWM leading edge count value */
eMIOS_UC_1.UC[20].B.R = 500; /* PWM trailing edge count value */
eMIOS_UC_1.UC[20].C.B.BSL = 0; /* Timebase: counter bus A (chan 23) */
eMIOS_UC_1.UC[20].C.B.EDPOL = 1; /* Output polarity on A match */
eMIOS_UC_1.UC[20].C.B.MODE = 0x60; /* Output Pulse Width Modulation Buf'd*/
SIUL2.MSCR[77].B.SSS = 1; /* Pad PG2: Source signal is E1UC_11_H */
SIUL2.MSCR[77].B.OBE = 1; /* Pad PG2: OBE=1 (LED1 on Freescale EVB) */
}

There is no PWM output from PE13.

I changed it to PE12 and confirmed the PWM output was normal.

Is that a problem?

Re: MPC5748G PWM

PetrS — Mon, 12 Aug 2019 10:34:17 GMT

Hi,

set SIUL2.MSCR[77].B.SSS = 2;

BR, Petr

Re: MPC5748G PWM

syerlank — Thu, 13 May 2021 19:24:09 GMT

@PetrS Hello,

I'm using PF[6] for eMIOS_0_23_X and PP[13] for eMIOS_1_23_X. I'm able to get PWM output for PF[6] (eMIOS_0_23_X) but I'm not able to see PWM output for PP[13] (eMIOS_1_23_X). I also enabled global prescaled clock and time base for both emios0 and 1. Below is code snippet, can you please assist me?

/*-------eMIOS_0_23_X ----------*/

eMIOS_UC_0.UC[23].C.R = 0x0;
eMIOS_UC_0.UC[23].A.R = 20;
eMIOS_UC_0.UC[23].B.R = 200;
eMIOS_UC_0.UC[23].CNT.R = 1;
eMIOS_UC_0.UC[23].C.B.EDPOL = 1;
eMIOS_UC_0.UC[23].C.B.MODE = 0x58;
eMIOS_UC_0.UC[23].C.B.UCPRE = 0;
eMIOS_UC_0.UC[23].C.B.UCPREN= 1;

SIUL2.MSCR[86].B.SSS = 1;
SIUL2.MSCR[86].B.OBE = 1;
SIUL2.MSCR[86].B.src=3 or 4;

/*-------eMIOS_0_23_X ----------*/

/*-------eMIOS_1_23_X ----------*/

eMIOS_UC_1.UC[23].C.R = 0x0;
eMIOS_UC_1.UC[23].A.R = 20;
eMIOS_UC_1.UC[23].B.R = 200;
eMIOS_UC_1.UC[23].CNT.R = 1;
eMIOS_UC_1.UC[23].C.B.EDPOL = 1;
eMIOS_UC_1.UC[23].C.B.MODE = 0x58;
eMIOS_UC_1.UC[23].C.B.UCPRE = 0;
eMIOS_UC_1.UC[23].C.B.UCPREN= 1;

SIUL2.MSCR[253].B.SSS = 1;
SIUL2.MSCR[253].B.OBE = 1;
SIUL2.MSCR[253].B.src=3;

/*-------eMIOS_1_23_X ----------*/