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    <title>MPC5xxx中的主题 Re: MPC5777C FlexCan RX FIFO filtering</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-FlexCan-RX-FIFO-filtering/m-p/1257111#M17894</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;whole filter ID table is used for matching algorithm, so you should initialize whole ID table.&amp;nbsp;&lt;BR /&gt;The ID is accepted by RXFIFO based on this ID table and acceptance mask registers. So if you have rest of filter elements cleared and mask registers set to compare all bits of IDs, then ID 0 will be accepted by RXFIFO too, simply because there is matched ID in the filter table&lt;BR /&gt;Thus the only way is to fill all entries with the same ID as you wrote. But you can easily update filter table based on your needs in future.&lt;/P&gt;
&lt;P&gt;BR, Petr&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 06 Apr 2021 08:16:35 GMT</pubDate>
    <dc:creator>PetrS</dc:creator>
    <dc:date>2021-04-06T08:16:35Z</dc:date>
    <item>
      <title>MPC5777C FlexCan RX FIFO filtering</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-FlexCan-RX-FIFO-filtering/m-p/1254965#M17882</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;When RX FIFO is enabled, by default MB0-5 are used for the FIFO and MB6-7 are used for the filters for FIFO (CAN_CTRL2[RFFN] = 0 means 8 entries for filters). When i add one entry of the filter lets say 0x100 it works ok, but i can also see that frames with ID 0 are accepted into the FIFO because i assume other entries are empty. What is the proper way to filter out those frames? I don't really like idea of filling all filter entries with the same ID because i would like to leave them for future extensions. Or am i misunderstanding something?&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;</description>
      <pubDate>Wed, 31 Mar 2021 12:42:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-FlexCan-RX-FIFO-filtering/m-p/1254965#M17882</guid>
      <dc:creator>darq</dc:creator>
      <dc:date>2021-03-31T12:42:43Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777C FlexCan RX FIFO filtering</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777C-FlexCan-RX-FIFO-filtering/m-p/1257111#M17894</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;whole filter ID table is used for matching algorithm, so you should initialize whole ID table.&amp;nbsp;&lt;BR /&gt;The ID is accepted by RXFIFO based on this ID table and acceptance mask registers. So if you have rest of filter elements cleared and mask registers set to compare all bits of IDs, then ID 0 will be accepted by RXFIFO too, simply because there is matched ID in the filter table&lt;BR /&gt;Thus the only way is to fill all entries with the same ID as you wrote. But you can easily update filter table based on your needs in future.&lt;/P&gt;
&lt;P&gt;BR, Petr&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 06 Apr 2021 08:16:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777C-FlexCan-RX-FIFO-filtering/m-p/1257111#M17894</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2021-04-06T08:16:35Z</dc:date>
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