MPC5xxxのトピックRe: MPC5775K FlexCAN CAN0

MPC5775K FlexCAN CAN0

ronliu — Wed, 17 Feb 2016 09:31:03 GMT

Dear All,

I'm using the MPC5775K now. But the CAN0 ( FlexCAN module) can not work well. And the program is always suspending in the below line.

while ( (CAN_0.IFLAG1.B.BUF31TO8I & 1) == 0) { } // wait until the tx is completed.

This problem bothers me all the day. Could someone give me advice about the CAN0, please? It would be better if you can share me the example code of FlexCAN.

Thanks a lot.

Regards,

Ron

Martin Kovar

Re: MPC5775K FlexCAN CAN0

martin_kovar — Thu, 18 Feb 2016 12:11:43 GMT

Hi Ron,

I am just working on FlexCAN module example. As soon as I will finish it, I will post it here.

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

martin_kovar — Thu, 18 Feb 2016 14:49:46 GMT

Hi Ron,

Look at this example. It shows, how to configure FlexCAN modules, and how to transmit and receive data. But be careful about FlexCAN modules connection. Correct connection is described in the example description.

Example MPC5775K FlexCAN_with_interrupts S32DS

If you have any other questions, please feel free to write me back.

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

ronliu — Fri, 19 Feb 2016 06:16:14 GMT

Hi Martin,

Thanks for your sample code. When I test the code you provide in the MPC5775K demo board, the project can work correctly. But, when I copy all the codes into my S32 project, my project cannot work. The MCU doesn't output the signal on the CAN bus. My S32 project was created by IDE default wizard. Are there some points I ignore？Could you give some directions？ Thanks a lot.

Regard,

Ron

Re: MPC5775K FlexCAN CAN0

ronliu — Fri, 19 Feb 2016 06:49:41 GMT

Hi,

This is my test project. The FlexCAN module couldn't work correctly.:smileyangry:

static void Sysclk_Init(void)
{
CGM.AC3_SC.B.SELCTL =0x01; //connect (40MHz) XTALL to the PLL0 input

/*Set PLL0 to 266MHz with XOSC 40MHz*/
PLLDIG.PLL0DV.R = 0x50024035; //predefined PLL0 divider register

MC_ME.RUN_PC[0].R = 0xFE; /*Enable all modes for all peripherals using
ME_RUN_PC[0]*/
MC_ME.RUN_MC[0].B.XOSCON = 1; //Enable external oscillator
MC_ME.RUN_MC[0].B.PLL0ON = 1; //Enable PLL0 for RUN1 mode
MC_ME.RUN_MC[0].B.SYSCLK = 0x2; //source PLL0 PHI for RUN1 mode

//Mode transition to apply the PLL0 setup and set Normal mode with PLL running
MC_ME.MCTL.R = 0x40005AF0; //DRUN Mode & Key
MC_ME.MCTL.R = 0x4000A50F; //DRUN Mode & Key

while(!MC_ME.GS.B.S_PLL0); //ME_GS Wait for PLL stabilization.
while(MC_ME.GS.B.S_MTRANS); //Waiting for end of transaction

/* ME_GS Check RUN1 mode has successfully been entered*/
while(MC_ME.GS.B.S_CURRENT_MODE != 0x4);
}

static void InitPeriClkGen(void)
{
CGM.AC0_SC.B.SELCTL = 0x2; // Select PLL0 for auxiliary clock 0
CGM.AC0_DC0.B.DIV = 1;    // MC_CLK : Enable aux clk 0 div by 2 �133 MHz)
CGM.AC0_DC1.B.DIV = 15;    // SWG_CLK : Enable aux clk 0 div by 16 �16.625 MHz)
CGM.AC0_DC2.B.DIV = 3;    // ADC_CLK : Enable aux clk 0 div by 4 �66.6 MHz)

CGM.AC1_SC.B.SELCTL = 0x2; // Select PLL0 for auxiliary clock 1
CGM.AC1_DC0.B.DIV = 3; // FR_CLK : Enable aux clk 1 div by 4 �(66.6 MHz)

CGM.AC2_SC.B.SELCTL = 0x2; // Select PLL0 for auxiliary clock 2
CGM.AC2_DC0.B.DIV = 3; // CAN_CLK : Enable aux clk 2 div by 4 �(66.6 MHz)

CGM.AC7_SC.B.SELCTL = 0x2; // Select PLL0 for auxiliary clock 7
CGM.AC7_DC0.B.DIV = 1; // CAN_CLK : Enable aux clk 7 div by 2 �(133 MHz)

CGM.AC13_SC.B.SELCTL = 0x6; // Select PBRIDGE_0_CLK for auxiliary clock 13
CGM.AC13_DC0.B.DIV = 0; // LIN_CLK : Enable aux clk 13 div by 1 �(66 MHz)
}

static void GPIO_Init(void)
{
SIUL2.MSCR[16].B.SSS = 1;    /* Pad n17: Source signal is CAN0_TX */
SIUL2.MSCR[16].B.OBE = 1;    /* Pad n17: Output Buffer Enable */
SIUL2.MSCR[16].B.SRC = 3;    /* Pad n17: Maximum slew rate */

SIUL2.MSCR[17].B.IBE = 1; /* Pad n18: Enable pad for input - CAN0_RXD */
SIUL2.IMCR[0].B.SSS = 0; /* CAN_0_RXD: connected to pad n18 */

SIUL2.MSCR[14].B.SSS = 1;    /* Pad P17: Source signal is CAN0_TX */
SIUL2.MSCR[14].B.OBE = 1;    /* Pad P17: Output Buffer Enable */
SIUL2.MSCR[14].B.SRC = 3;    /* Pad P17: Maximum slew rate */

SIUL2.MSCR[15].B.IBE = 1; /* Pad P18: Enable pad for input - CAN0_RXD */
SIUL2.IMCR[1].B.SSS = 2; /* CAN0_RXD: connected to pad P18 */
}

static void FlexCAN_0_Init()
{
int i = 0;

/*Module enable*/
CAN_0.MCR.B.MDIS = 0;

/*Source clk is oscillator clock (40MHz)*/
CAN_0.CTRL1.B.CLKSRC = 0;

/*Error correction configuration register enable*/
CAN_0.CTRL2.B.ECRWRE = 1;

/*Enable unrestricted write access to FlexCAN memory*/
CAN_0.CTRL2.B.WRMFRZ = 1;

/*Error configuration register write enable*/
CAN_0.MECR.B.ECRWRDIS = 0;

/*Disable memory error correction*/
CAN_0.MECR.B.ECCDIS = 1;

/*Keep normal operation*/
CAN_0.MECR.B.NCEFAFRZ = 0;

/*Error configuration register write disable*/
CAN_0.MECR.B.ECRWRDIS = 1;

/*Disable unrestricted write access to FlexCAN memory*/
CAN_0.CTRL2.B.WRMFRZ = 0;

/*Error correction configuration register disable*/
CAN_0.CTRL2.B.ECRWRE = 0;

/*CAN bit timing - 40MHz oscillator, 100kbps bit rate,*/
CAN_0.CTRL1.B.PRESDIV = 39; //40/(DIV + 1)
CAN_0.CTRL1.B.RJW = 3;
CAN_0.CTRL1.B.PSEG1 = 3;
CAN_0.CTRL1.B.PSEG2 = 3;
CAN_0.CTRL1.B.PROPSEG = 0;

/*Clear all RX individual Mask Registers The corresponding bit in the
* filter is "don't care."*/
for(i = 0; i < 64; i++)
{
CAN_0.RXIMR[i].R = 0x00000000;
}

/*Set all message buffers RX inactive*/
for(i = 0; i <64; i++)
{
CAN_0.MB[i].CS.R = 0x0000;
}

/*No freeze mode request*/
CAN_0.MCR.B.HALT = 0;
}

static void Transmit_Message(void)
{
CAN_0.MB[0].CS.B.CODE = 0x8; //MB TX inactive
CAN_0.MB[0].ID.B.ID_STD = 0; //set message STD ID
// CAN_0.MB[0].DATA.W[1] = 0xAABBCCDD; //data1 set
// CAN_0.MB[0].DATA.W[0] = 0x12345678; //data0 set

CAN_0.MB[0].DATA.B[0] = 0x55;
CAN_0.MB[0].DATA.B[1] = 0x55;
CAN_0.MB[0].DATA.B[2] = 0x55;
CAN_0.MB[0].DATA.B[3] = 0x55;
CAN_0.MB[0].DATA.B[4] = 0x55;
CAN_0.MB[0].DATA.B[5] = 0x55;
CAN_0.MB[0].DATA.B[6] = 0x55;
CAN_0.MB[0].DATA.B[7] = 0x55;

CAN_0.MB[0].CS.B.DLC = 8;    //message length 8 bytes
CAN_0.MB[0].CS.B.RTR = 0;    //remote frame disable
CAN_0.MB[0].CS.B.IDE = 0;    //extended bit disable
CAN_0.MB[0].CS.B.SRR = 0;    //not used with STD_ID
CAN_0.MB[0].CS.B.CODE = 0xC;    //MB once transmit data
}

#define KEY_VALUE1 0x5AF0ul
#define KEY_VALUE2 0xA50Ful

extern void xcptn_xmpl(void);

void hw_init(void)
{
#if defined(TURN_ON_CPU1) || defined(TURN_ON_CPU2)
uint32_t mctl = MC_ME.MCTL.R;
#endif
#if defined(TURN_ON_CPU1)
/* enable core 1 in all modes */
MC_ME.CCTL2.R = 0x00FE;
/* Set Start address for core 1: Will reset and start */
MC_ME.CADDR2.R = 0x1100000 | 0x1;
#endif
#if defined(TURN_ON_CPU2)
/* enable core 2 in all modes */
MC_ME.CCTL3.R = 0x00FE;
/* Set Start address for core 2: Will reset and start */
MC_ME.CADDR3.R = 0x1200000 | 0x1;
#endif
#if defined(TURN_ON_CPU1) || defined(TURN_ON_CPU2)
MC_ME.MCTL.R = (mctl & 0xffff0000ul) | KEY_VALUE1;
MC_ME.MCTL.R = mctl; /* key value 2 always from MCTL */
#endif
}

__attribute__ ((section(".text")))
int main(void)
{
int counter = 0;

xcptn_xmpl (); /* Configure and Enable Interrupts */

Sysclk_Init();
InitPeriClkGen();
GPIO_Init();
FlexCAN_0_Init();
Transmit_Message();

for(;;) {
counter++;
}

return 0;
}

Re: MPC5775K FlexCAN CAN0

ronliu — Fri, 19 Feb 2016 07:37:53 GMT

Hi Martin,

I find that the sample can work correctly if I create the S32DS project in the single core mode. In single core mode, the below part doesn't processed. But if I create a new project in multi-core mode, the CAN module wouldn't work well. The hw_init() function is added by the S32 IDE. I don't know why this problem happens in mutli-core mode. Thanks.

Regard,

Ron

sample code:

void hw_init(void)

{

#if defined(TURN_ON_CPU1) || defined(TURN_ON_CPU2)

uint32_t mctl = MC_ME.MCTL.R;

#endif

#if defined(TURN_ON_CPU1)

/* enable core 1 in all modes */

MC_ME.CCTL2.R = 0x00FE;

/* Set Start address for core 1: Will reset and start */

MC_ME.CADDR2.R = 0x1100000 | 0x1;

#endif

#if defined(TURN_ON_CPU2)

/* enable core 2 in all modes */

MC_ME.CCTL3.R = 0x00FE;

/* Set Start address for core 2: Will reset and start */

MC_ME.CADDR3.R = 0x1200000 | 0x1;

#endif

#if defined(TURN_ON_CPU1) || defined(TURN_ON_CPU2)

MC_ME.MCTL.R = (mctl & 0xffff0000ul) | KEY_VALUE1;

MC_ME.MCTL.R = mctl; /* key value 2 always from MCTL */

#endif

}

Re: MPC5775K FlexCAN CAN0

martin_kovar — Fri, 19 Feb 2016 07:43:08 GMT

Hi Ron,

if you create multicore project, S32DS creates it's own hw_init, which starts other two cores. In this case it is important to rename my hw_init function or rename default S32DS function.

I will test FlexCAN with multicore project and I will write you back as soon as possible.

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

martin_kovar — Fri, 19 Feb 2016 09:42:31 GMT

Hi Ron,

try this multicore. I tested it and it works correct. There is function hw_init, which boots cores Z7 (this function is created by S32). This function is called during startup. Function HW_Init initializes FMPLL, peripheral clocks and other hardware.

About EVB connection there is not necessary to use connection, which I write in my first project. You can use jumpers J32 and J35 fitted and jumpers J37 and J38 fitted in the position 2-3.

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

ronliu — Fri, 19 Feb 2016 10:29:45 GMT

Thanks Martin,

When I want to try the sample code, this problem occurs. Do I have to configure the IDE or the project ?

Regards,

Ron

Re: MPC5775K FlexCAN CAN0

martin_kovar — Fri, 19 Feb 2016 11:01:54 GMT

Hi Ron,

no, I use default project also IDE settings. But I have an idea. Exit S32DS, switch to the Windows task manager and kill processes s32de.exe and power-pc-eabivle-gdb.exe. Next step, right click on project and select Clean Project. Then build project again. Last step is to click on the arrow next to the bug and select MPC5775K-CAN_with_interrupts_Multicore-S32DS_LaunchGroup (look at the figure in the attachment). Now it should be OK.

Password for connection is DEAD_DEED_FADE_BADE

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

ronliu — Sun, 21 Feb 2016 08:21:07 GMT

Hi Martin,

Thanks for your help. I don't quite understand the last step. Could you give me more details about the last step. However， I want to add the FlexCAN files which can work correctly into my own project. You know, the time is limited. I must make my project function well as soon as possible.Could you please send me the independent files? I'd like to use them directly.:smileyhappy:

Regards,

Ron

Re: MPC5775K FlexCAN CAN0

ronliu — Mon, 22 Feb 2016 09:26:08 GMT

what do you mean about "Password for connection is DEAD_DEED_FADE_BADE"?

Re: MPC5775K FlexCAN CAN0

martin_kovar — Mon, 22 Feb 2016 09:34:55 GMT

Hi,

if you want to debug the project using PEMicro USB multilink, you have to enter this password during the connecting to the device.

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

ronliu — Tue, 23 Feb 2016 04:15:20 GMT

Hi, Martin

When I check your sample code, I couldn't find the function "void hw_init(void)".

I don't understand why the function is created in my new project by IDE default mode. But I couldn't find it in your project.

Thanks.

Regards,

Ron

Re: MPC5775K FlexCAN CAN0

martin_kovar — Tue, 23 Feb 2016 07:29:40 GMT

Hi Ron,

function hw_init is created automatically by IDE when you create multicore project. This function starts other Z7 core(s) and it is called during startup (Startup.s file). If you open startup file you will see the calling of the function before function main is called. Calling of the function hw_init is conditioned by HW_INIT symbol definition. But you can modify the startup file and start other cores wherever you want. You can look at this project:

Example MPC5775K PinToggleStationery S32DS

You can find defined symbols in project Properties/C/C++ build/Assembler Symbols

In single core projects IDE does not create hw_init function, because only Z4 core starts.

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

ronliu — Tue, 23 Feb 2016 08:23:44 GMT

Martin,

Thanks for your help again ! :smileylaugh: With your direction， my project can work now. But there is a strange issues always troubling me. I don't understand why the flexCAN module can work correctly only when I close HW_INIT symbol. In my opinion , there might be some conflict between multicore and CAN. :smileyshocked:

Regards,

Ron

Re: MPC5775K FlexCAN CAN0

martin_kovar — Tue, 23 Feb 2016 08:59:24 GMT

Hi Ron,

just a simple idea. Try to change the define in flashrchw.c file. There is #define MPC57xx_ID 0x005A0000 change the value to 0x005A0001. There is not any problem with CAN in multicore project. I had tried and it worked fine.

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

ronliu — Tue, 23 Feb 2016 10:08:36 GMT

Martin,

Thanks. I changed the MPC57xx_ID value to 0x005A0001. But my project still cannot work when I call the function"void CORE_INIT(void)". Maybe there are something wrong with my project. However , I couldn't figure it out now.

Regards,

Ron

void CORE_INIT(void)
{
/* Enable cores if running from RAM or not using the BAF to boot cores*/
/* Enable Cores - Will start on next mode transistion */

    /* Enable or disable core 0 (Z4 - Lock Step Core) */
    MC_ME.CCTL1.R = 0x00FE; /* enable core */
//      MC_ME.CCTL[1].R = 0x0000; /* disable core */

    /* Enable or disable core 1 (z7a) */
    MC_ME.CCTL2.R = 0x00FE; /* enable core */
//      MC_ME.CCTL[2].R = 0x0000; /* disable core */

    /* Enable or disable core 2 (z7b)*/
    MC_ME.CCTL3.R = 0x00FE; /* enable core */
//      MC_ME.CCTL[3].R = 0x0000; /* disable core */
}

Re: MPC5775K FlexCAN CAN0

martin_kovar — Tue, 23 Feb 2016 11:13:23 GMT

Hi Ron,

it seems that your function is not written correct. I do not see there mode transition. If you want to boot Z7 cores use this construction:

#define KEY_VALUE1 0x5AF0ul

#define KEY_VALUE2 0xA50Ful

void CORE_INIT(void)

{

uint32_t mctl = MC_ME.MCTL.R;

MC_ME.CCTL2.R = 0x00FE;

/* Set Start address for core 1: Will reset and start */

MC_ME.CADDR2.R = 0x1100000 | 0x1;

MC_ME.CCTL3.R = 0x00FE;

/* Set Start address for core 2: Will reset and start */

MC_ME.CADDR3.R = 0x1200000 | 0x1;

/*Mode transition*/

MC_ME.MCTL.R = (mctl & 0xffff0000ul) | KEY_VALUE1;

MC_ME.MCTL.R = mctl; /* key value 2 always from MCTL */

}

Z4 core is the main core and this boot automatically. You cannot choose which core will be boot first. It is always Z4. From Z4 core you can boot other two cores.

Regards,

Martin

Re: MPC5775K FlexCAN CAN0

ronliu — Wed, 24 Feb 2016 08:37:04 GMT

Martin,

Thanks！

There are still something wrong with my multicore project . I have more urgent thing to do . I want to transfer a very large array by CAN bus now . So I create a new function to finish it. How do I check the CAN tx status？ I have tried this code ，but some messages are lost.

Regards，

Ron