topic MPC5777c, eTPU: input pins configuration in MPC5xxx

MPC5777c, eTPU: input pins configuration

cedric_toncanie — Thu, 03 Oct 2019 15:27:53 GMT

Hi,

On MPC5777 we configures eTPU B channel 0-1 as inputs (PCR147 -148) with PA = Primary function and IBE set to 1.

SIU PCR 147 Configuration Register:

Despite state changes on eTPU inputs pins, we still see 0 inside CSCR.IPS. Like there was no activity on the pins.

eTPU B CSCR Register:

We are able to play on the output pins. Our ETPU source code is running perfectly on MPC5644A.

ETPU B Configuration Register:

ETPU B Time Base Configuration Register:

Do you have any suggestions about maybe a missing SIU/ETPU configuration ?

Best Regards,

Cedric

Re: MPC5777c, eTPU: input pins configuration

PetrS — Fri, 04 Oct 2019 05:19:38 GMT

Hi,

This is probably caused by IGF filter, which is placed between pad and some eTPU channels.
See chapter 39.1.3 “IGF interaction with other modules” of the device RM for more info. By default the IGF is in configuration mode (MCR[FGEN]=0) and the filter output is kept at logic '0' state. You can enable the filter by setting FGEN bit. By default, bypass mode is selected so enabling the IGF should be enough to see transitions on the eTPU channel.

From Table 39-3 you can see IGF_1 channels 17-31 are mapped to ETPUB0-14.

BR, Petr

Re: MPC5777c, eTPU: input pins configuration

cedric_toncanie — Tue, 08 Oct 2019 16:00:19 GMT

Thank you Petr. It solved my issue.