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    <title>topic Re: MPC5777M uart problem on S32DS in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896468#M13261</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;your ME_PCTL for SIUL2 is not active. In other words there is no clock for SIUL2 module.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Configure ME correctly as latest cut of device is disabling SIUL in BAF. In you application you have to enable MC_ME_PCTL15 for target mode and do mode translation. Then it will work. Otherwise the pins wont be active.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;So use&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;MC_ME.PCTL15.R = 0;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;before doing final mode transition in&amp;nbsp;SysClk_Init().&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Also use register access to config&amp;nbsp; pins, i.e.&lt;/P&gt;&lt;P&gt;/* Configure pad PD14 for AF1 func: LIN2TX */&lt;BR /&gt; SIUL2.MSCR_IO[62].R = 0x32000002;&lt;/P&gt;&lt;P&gt;/* Configure pad PD15 for LIN0RX */&lt;BR /&gt; SIUL2.MSCR_IO[63].R = 0x0080000; /&lt;SPAN&gt;* Pad PD15: Enable pad for input - LIN2_RXD */&lt;/SPAN&gt;&lt;BR /&gt;SIUL2.MSCR_IO[850].R = 1; /* LIN2_RXD: connected to pad PD15 */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 17 Apr 2019 09:51:01 GMT</pubDate>
    <dc:creator>PetrS</dc:creator>
    <dc:date>2019-04-17T09:51:01Z</dc:date>
    <item>
      <title>MPC5777M uart problem on S32DS</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896467#M13260</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;MPC5777M uart can't send or recv any data, when I thransplant &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-329848"&gt;Example MPC5777M LINFlex UART Echo SW polling GHS614&lt;/A&gt;&amp;nbsp;to S32DS. It always block at '&lt;SPAN style="background-color: #f6f6f6;"&gt;while (1 != LINFlexD_2.UARTSR.B.DTFTFF) {};&lt;SPAN&gt;&amp;nbsp;' or 'while (1 != LINFlexD_2.UARTSR.B.DRFRFE) {}'&amp;nbsp; when debuging on matherboard. Can someone help me? &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/martinkovar"&gt;martinkovar&lt;/A&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;BR /&gt;void SysClk_Init(void)&lt;BR /&gt;{&lt;BR /&gt; MC_CGM.AC3_SC.B.SELCTL = 0x01; //connect XOSC to the PLL0 input&lt;BR /&gt; MC_CGM.AC4_SC.B.SELCTL = 0x01; //connect XOSC to the PLL1 input&lt;/P&gt;&lt;P&gt;// Set PLL0 to 300 MHz with 40MHz XOSC reference&lt;BR /&gt; PLLDIG.PLL0DV.R = 0x4002100F; // PREDIV = 1, MFD = 15, RFDPHI = 2, RFDPHI1 = 8&lt;/P&gt;&lt;P&gt;MC_ME.RUN_MC[0].R = 0x00130070; // RUN0 cfg: IRCON,OSC0ON,PLL0ON,syclk=IRC&lt;/P&gt;&lt;P&gt;// Mode Transition to enter RUN0 mode:&lt;BR /&gt; MC_ME.MCTL.R = 0x40005AF0; // Enter RUN0 Mode &amp;amp; Key&lt;BR /&gt; MC_ME.MCTL.R = 0x4000A50F; // Enter RUN0 Mode &amp;amp; Inverted Key&lt;BR /&gt; while (MC_ME.GS.B.S_MTRANS) {}; // Wait for mode transition to complete&lt;BR /&gt; while(MC_ME.GS.B.S_CURRENT_MODE != 4) {}; // Verify RUN0 is the current mode&lt;/P&gt;&lt;P&gt;// Set PLL1 to 600 MHz with 40MHz XOSC reference&lt;BR /&gt; PLLDIG.PLL1DV.R = 0x0001001E; // MFD = 30, RFDPHI = 1&lt;/P&gt;&lt;P&gt;MC_ME.RUN_PC[0].R = 0x000000FE; // enable peripherals run in all modes&lt;BR /&gt; MC_ME.RUN_MC[0].R = 0x001300F4; // RUN0 cfg: IRCON, OSC0ON, PLL1ON, syclk=PLL1&lt;/P&gt;&lt;P&gt;MC_CGM.SC_DIV_RC.R = 0x00000001; //! System clock divider ratios will change with next update. Not required for Cut 1.&lt;BR /&gt; MC_CGM.DIV_UPD_TYPE.R = 0x80000000; //! System clock divider ratios updated on writing MC_CGM.DIV_UPD_TRIG. Not required for Cut 1.&lt;/P&gt;&lt;P&gt;MC_CGM.SC_DC2.R = 0x800B0000; // PBRIDGEA/PBRIDGEB_CLK at syst clk div by 12 ... (50 MHz)&lt;BR /&gt; MC_CGM.SC_DC1.R = 0x80050000; // SXBAR_CLK at syst clk div by 6 ... (100 MHz)&lt;BR /&gt; MC_CGM.SC_DC0.R = 0x80020000; // FXBAR_CLK, BD_CLK, IOP_CLK at syst clk div by 3 ... (200 MHz)&lt;BR /&gt; MC_CGM.SC_DC3.R = 0x80010000; // COMP/CHKR_CLK at syst clk div by 2 ... (300 MHz)&lt;BR /&gt; MC_CGM.SC_DC4.R = 0x800A0000; // CLKOUT at syst clk div by 11 ... (54.55 MHz)&lt;/P&gt;&lt;P&gt;MC_CGM.DIV_UPD_TRIG.R = 0xfeedface; //! System clock divider ratio updates triggered. Not required for Cut 1.&lt;BR /&gt; while (MC_CGM.DIV_UPD_STAT.B.SYS_UPD_STAT == 1) //! Wait for System Clock Divider Update Status == 0. Not required for Cut 1.&lt;BR /&gt; {&lt;BR /&gt; asm("nop");&lt;BR /&gt; }&lt;/P&gt;&lt;P&gt;// Mode Transition to enter RUN0 mode:&lt;BR /&gt; MC_ME.MCTL.R = 0x40005AF0; // Enter RUN0 Mode &amp;amp; Key&lt;BR /&gt; MC_ME.MCTL.R = 0x4000A50F; // Enter RUN0 Mode &amp;amp; Inverted Key&lt;BR /&gt; while (MC_ME.GS.B.S_MTRANS) {}; // Wait for mode transition to complete&lt;BR /&gt; while(MC_ME.GS.B.S_CURRENT_MODE != 4) {}; // Verify RUN0 is the current mode&lt;/P&gt;&lt;P&gt;MC_CGM.AC0_SC.R = 0x02000000; // Select PLL0 for auxiliary clock 0&lt;BR /&gt; MC_CGM.AC0_DC0.R = 0x80050000; // PER_CLK : Enable aux clk 0 div by 6 ?(50 MHz)&lt;BR /&gt; MC_CGM.AC0_DC4.R = 0x80020000; // DSPI_CLK1, LIN_CLK : Enable aux clk 0 div by 3 ?(100 MHz)&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void SUIL2_Init(void)&lt;BR /&gt;{&lt;BR /&gt; SIUL2.MSCR_IO[4].R = 0x12380000; // toggled in Core 2 while loop&lt;BR /&gt; SIUL2.MSCR_IO[0].R = 0x12380000; // toggled in Core 2 PIT ISR&lt;/P&gt;&lt;P&gt;/* Configure pad PD14 for AF1 func: LIN2TX */&lt;BR /&gt; SIUL2.MSCR_IO[62].B.SSS = 2; /* Pad PD14: Source signal is LIN0_TXD */&lt;BR /&gt; SIUL2.MSCR_IO[62].B.ODC = 2; /* Pad PD14: push-pull Output */&lt;BR /&gt; SIUL2.MSCR_IO[62].B.OERC = 3; /* Pad PD14: Maximum slew rate */&lt;BR /&gt; /* Configure pad PD15 for LIN0RX */&lt;BR /&gt; SIUL2.MSCR_IO[63].B.IBE = 1; /* Pad PD15: Enable pad for input - LIN0_RXD */&lt;BR /&gt; SIUL2.MSCR_IO[850].B.SSS = 1; /* LIN0_RXD: connected to pad PD15 */&lt;BR /&gt; //SIUL2.MSCR_MUX[338].B.SSS = 1; /* LIN0_RXD: connected to pad PD14 */&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void LINFlexD_2_Init (void)&lt;BR /&gt;{&lt;BR /&gt; /* enter INIT mode */&lt;BR /&gt; LINFlexD_2.LINCR1.R = 0x0081; /* SLEEP=0, INIT=1 */&lt;/P&gt;&lt;P&gt;/* wait for the INIT mode */&lt;BR /&gt; while (0x1000 != (LINFlexD_2.LINSR.R &amp;amp; 0xF000)) {}&lt;/P&gt;&lt;P&gt;/* configure for UART mode */&lt;BR /&gt; LINFlexD_2.UARTCR.R = 0x0001; /* set the UART bit first to be able to write the other bits */&lt;/P&gt;&lt;P&gt;LINFlexD_2.UARTCR.R = 0x0033 | TXFIFO &amp;lt;&amp;lt; 8 | RXFIFO &amp;lt;&amp;lt; 9; /* 8bit data, no parity, Tx and Rx enabled, UART mode */&lt;BR /&gt; /* Transmit buffer size = 1 (TDFL = 0 */&lt;BR /&gt; /* Receive buffer size = 1 (RDFL = 0) */&lt;/P&gt;&lt;P&gt;/* configure baudrate 19200 */&lt;BR /&gt; /* assuming 100 MHz baud clock (LIN_clk below)*/&lt;BR /&gt; /* LFDIV = LIN_clk / (16 * desired baudrate)&lt;BR /&gt; LINIBRR = integer part of LFDIV&lt;BR /&gt; LINFBRR = 16 * fractional part of LFDIV (after decimal point)&lt;/P&gt;&lt;P&gt;for instance:&lt;BR /&gt; LFDIV = 100e6/(16*19200) = 325.52083&lt;BR /&gt; LINIBRR = 325&lt;BR /&gt; LINFBRR = 16*0.52083 = 8&lt;BR /&gt; */&lt;/P&gt;&lt;P&gt;LINFlexD_2.LINFBRR.R = 8;&lt;BR /&gt; LINFlexD_2.LINIBRR.R = 325;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; /* enter NORMAL mode */&lt;BR /&gt; LINFlexD_2.LINCR1.R = 0x0080; /* INIT=0 */&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void TransmitCharacter(uint8_t ch)&lt;BR /&gt;{&lt;BR /&gt; // address of LINFLEX_0.BDRL.B.DATA0&lt;BR /&gt; unsigned char *pTX = (unsigned char *)&amp;amp;LINFlexD_2.BDRL.R + 3;&lt;/P&gt;&lt;P&gt;#if TXFIFO /* TXFIFO selected */&lt;/P&gt;&lt;P&gt;while (1 == LINFlexD_2.UARTSR.B.DTFTFF) {}; // wait if TXFIFO is full&lt;BR /&gt; /* write character to transmit buffer&lt;BR /&gt; byte access have to be used in TXFIFO mode&lt;BR /&gt; compiler can use word instructions for byte access thus byte pointer is used instead */&lt;/P&gt;&lt;P&gt;//LINFlexD_2.BDRL.B.DATA0 = ch;&lt;BR /&gt; *pTX = ch; /* write character to transmit buffer */&lt;/P&gt;&lt;P&gt;#else /* TX buffer mode selected */&lt;/P&gt;&lt;P&gt;*pTX = ch; /* write character to transmit buffer */&lt;BR /&gt; while (1 != LINFlexD_2.UARTSR.B.DTFTFF) {}; /* Wait for data transmission completed flag */&lt;BR /&gt; LINFlexD_2.UARTSR.R = 0x0002; /* clear the DTF flag and not the other flags */&lt;/P&gt;&lt;P&gt;#endif&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void ReadCharacter (void)&lt;BR /&gt;{&lt;/P&gt;&lt;P&gt;#if RXFIFO /* RXFIFO selected */&lt;/P&gt;&lt;P&gt;while (1 == LINFlexD_2.UARTSR.B.DRFRFE) {} /* Wait if RXFIFO is empty */&lt;/P&gt;&lt;P&gt;rx_data = (uint8_t)LINFlexD_2.BDRM.B.DATA4; /* get the data */&lt;/P&gt;&lt;P&gt;#else /* RX buffer mode selected */&lt;/P&gt;&lt;P&gt;while (1 != LINFlexD_2.UARTSR.B.DRFRFE) {} /* Wait for data reception completed flag */&lt;/P&gt;&lt;P&gt;while (1 != LINFlexD_2.UARTSR.B.RMB) {} /* Wait for Release Message Buffer */&lt;/P&gt;&lt;P&gt;rx_data = (uint8_t)LINFlexD_2.BDRM.B.DATA4; /* get the data */&lt;/P&gt;&lt;P&gt;/* clear the DRF and RMB flags by writing 1 to them */&lt;BR /&gt; LINFlexD_2.UARTSR.R = 0x0204;&lt;/P&gt;&lt;P&gt;#endif&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 16 Apr 2019 02:06:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896467#M13260</guid>
      <dc:creator>bwp530</dc:creator>
      <dc:date>2019-04-16T02:06:54Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777M uart problem on S32DS</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896468#M13261</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;your ME_PCTL for SIUL2 is not active. In other words there is no clock for SIUL2 module.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Configure ME correctly as latest cut of device is disabling SIUL in BAF. In you application you have to enable MC_ME_PCTL15 for target mode and do mode translation. Then it will work. Otherwise the pins wont be active.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;So use&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;MC_ME.PCTL15.R = 0;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;before doing final mode transition in&amp;nbsp;SysClk_Init().&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Also use register access to config&amp;nbsp; pins, i.e.&lt;/P&gt;&lt;P&gt;/* Configure pad PD14 for AF1 func: LIN2TX */&lt;BR /&gt; SIUL2.MSCR_IO[62].R = 0x32000002;&lt;/P&gt;&lt;P&gt;/* Configure pad PD15 for LIN0RX */&lt;BR /&gt; SIUL2.MSCR_IO[63].R = 0x0080000; /&lt;SPAN&gt;* Pad PD15: Enable pad for input - LIN2_RXD */&lt;/SPAN&gt;&lt;BR /&gt;SIUL2.MSCR_IO[850].R = 1; /* LIN2_RXD: connected to pad PD15 */&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR, Petr&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Apr 2019 09:51:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896468#M13261</guid>
      <dc:creator>PetrS</dc:creator>
      <dc:date>2019-04-17T09:51:01Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777M uart problem on S32DS</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896469#M13262</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you very much, it works. And must use&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;register access. my way in code can't work.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Apr 2019 10:26:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896469#M13262</guid>
      <dc:creator>bwp530</dc:creator>
      <dc:date>2019-04-17T10:26:28Z</dc:date>
    </item>
    <item>
      <title>Re: MPC5777M uart problem on S32DS</title>
      <link>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896470#M13263</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;so I check&lt;A _jive_internal="true" class="" data-containerid="11363" data-containertype="14" data-content-finding="Community" data-objectid="329848" data-objecttype="102" href="https://community.nxp.com/docs/DOC-329848" style="color: #3d9ce7; background-color: #ffffff; border: 0px; padding: 1px 0px 1px calc(12px + 0.35ex);"&gt;Example MPC5777M LINFlex UART Echo SW polling GHS614&lt;/A&gt;&amp;nbsp;again, the same problem in it.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 17 Apr 2019 11:15:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/MPC5777M-uart-problem-on-S32DS/m-p/896470#M13263</guid>
      <dc:creator>bwp530</dc:creator>
      <dc:date>2019-04-17T11:15:35Z</dc:date>
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