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    <title>MPC5xxxのトピックRe: Is there ram/register that will survive through reset R274</title>
    <link>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860019#M12640</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, it seems on this device only Software reset is the one, over which RAM content is preserved. You must then examine reset cause and if it is Software reset then you may omit some portion of SRAM initialization.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/73891i7D04586D61F27193/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 09 Jan 2019 08:57:55 GMT</pubDate>
    <dc:creator>davidtosenovjan</dc:creator>
    <dc:date>2019-01-09T08:57:55Z</dc:date>
    <item>
      <title>Is there ram/register that will survive through reset R274</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860017#M12638</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All &lt;/P&gt;&lt;P&gt;I looking for a way to pass data through a hard reset. IE a register or ram that is not pre-configured when a reset is applied.&lt;/P&gt;&lt;P&gt;Is there ram/register that will survive through reset in the R274. &lt;/P&gt;&lt;P&gt;I only need a few bytes.&lt;/P&gt;&lt;P&gt;I am currently using the SIPI regs to pass data through software resets but they don't survive any sort of hard reset.&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 08 Jan 2019 19:09:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860017#M12638</guid>
      <dc:creator>markthompson170</dc:creator>
      <dc:date>2019-01-08T19:09:14Z</dc:date>
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    <item>
      <title>Re: Is there ram/register that will survive through reset R274</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860018#M12639</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;from your description I am not sure about which kind of hard reset are you talking.&lt;/P&gt;&lt;P&gt;Reset divide to :&lt;/P&gt;&lt;P&gt;Power on reset - all registers are reset&lt;/P&gt;&lt;P&gt;Destructive resets&lt;/P&gt;&lt;P&gt;Functional resets&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You can use one of the core registers: Undefined on m_por assertion, unchanged on &lt;STRONG&gt;p_reset_b&lt;/STRONG&gt; assertion&lt;/P&gt;&lt;P&gt;List of them is in z7 core reference manual&amp;nbsp; Table 2-16. Reset Settings for e200 Resources.&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/reference-manual/e200z760RM.pdf" title="https://www.nxp.com/docs/en/reference-manual/e200z760RM.pdf"&gt;https://www.nxp.com/docs/en/reference-manual/e200z760RM.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 09 Jan 2019 08:50:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860018#M12639</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2019-01-09T08:50:13Z</dc:date>
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    <item>
      <title>Re: Is there ram/register that will survive through reset R274</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860019#M12640</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, it seems on this device only Software reset is the one, over which RAM content is preserved. You must then examine reset cause and if it is Software reset then you may omit some portion of SRAM initialization.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/73891i7D04586D61F27193/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 09 Jan 2019 08:57:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860019#M12640</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2019-01-09T08:57:55Z</dc:date>
    </item>
    <item>
      <title>Re: Is there ram/register that will survive through reset R274</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860020#M12641</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;HI David &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I’m thinking I can use the SPRG0-3 regs to hold my data and a software reset. This seems to work fine - asm (" mtspr 272, %r3");&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I don’t know a lot about PPC architecture, but I can’t figure out how the cause a software interrupt.&lt;/P&gt;&lt;P&gt;The MC_RGM handles the conditions but nothing I can locate indicates how to cause one.&lt;/P&gt;&lt;P&gt;Is the a special PPC instruction for softreset ?&lt;/P&gt;&lt;P&gt;Is there a system hardware block I need access ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Jan 2019 18:01:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860020#M12641</guid>
      <dc:creator>markthompson170</dc:creator>
      <dc:date>2019-01-16T18:01:26Z</dc:date>
    </item>
    <item>
      <title>Re: Is there ram/register that will survive through reset R274</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860021#M12642</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It seems SPRG0-3 have no defined functionality so they can be used by application software.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Use the MC_ME module to enter the RESET mode (SW functional reset):&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* software reset */&amp;nbsp;&amp;nbsp; &amp;nbsp;&lt;BR /&gt;ME.MCTL.R = 0x00005AF0;&lt;BR /&gt;ME.MCTL.R = 0x0000A50F;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This sequence resets the device.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Jan 2019 19:38:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860021#M12642</guid>
      <dc:creator>davidtosenovjan</dc:creator>
      <dc:date>2019-01-16T19:38:49Z</dc:date>
    </item>
    <item>
      <title>Re: Is there ram/register that will survive through reset R274</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860022#M12643</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks David &lt;/P&gt;&lt;P&gt;This seem to work great.&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Jan 2019 23:16:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Is-there-ram-register-that-will-survive-through-reset-R274/m-p/860022#M12643</guid>
      <dc:creator>markthompson170</dc:creator>
      <dc:date>2019-01-17T23:16:59Z</dc:date>
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