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    <title>topic Re: Regarding debug in core 0 and core 1 in MPC5777C in MPC5xxx</title>
    <link>https://community.nxp.com/t5/MPC5xxx/Regarding-debug-in-core-0-and-core-1-in-MPC5777C/m-p/771664#M11096</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;If the interrupt is configured to be executed in both cores, then it will be executed in both cores.&lt;/P&gt;&lt;P&gt;There is one interrupt controller INTC which sends external interrupt request to both cores.&lt;/P&gt;&lt;P&gt;The interrupts routines will be executed based on core status. (if he core is halt by debugger, then interrupt will be executed when core starts executing instructions again).&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 14 Nov 2017 11:02:07 GMT</pubDate>
    <dc:creator>petervlna</dc:creator>
    <dc:date>2017-11-14T11:02:07Z</dc:date>
    <item>
      <title>Regarding debug in core 0 and core 1 in MPC5777C</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Regarding-debug-in-core-0-and-core-1-in-MPC5777C/m-p/771663#M11095</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi i want to know that if i debug both core 0 and core 1 in MPC5777C then if i fully run or i put core 0 in Run mode and try to debug core 1 in step. Then if suppose any interrupt which is define in both core is raised in core 1 during debug ?&lt;/P&gt;&lt;P&gt;means we can run core 1 code with core 0 code in full run mode ?&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 Nov 2017 13:11:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Regarding-debug-in-core-0-and-core-1-in-MPC5777C/m-p/771663#M11095</guid>
      <dc:creator>sourabhjain</dc:creator>
      <dc:date>2017-11-13T13:11:13Z</dc:date>
    </item>
    <item>
      <title>Re: Regarding debug in core 0 and core 1 in MPC5777C</title>
      <link>https://community.nxp.com/t5/MPC5xxx/Regarding-debug-in-core-0-and-core-1-in-MPC5777C/m-p/771664#M11096</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;If the interrupt is configured to be executed in both cores, then it will be executed in both cores.&lt;/P&gt;&lt;P&gt;There is one interrupt controller INTC which sends external interrupt request to both cores.&lt;/P&gt;&lt;P&gt;The interrupts routines will be executed based on core status. (if he core is halt by debugger, then interrupt will be executed when core starts executing instructions again).&lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Nov 2017 11:02:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MPC5xxx/Regarding-debug-in-core-0-and-core-1-in-MPC5777C/m-p/771664#M11096</guid>
      <dc:creator>petervlna</dc:creator>
      <dc:date>2017-11-14T11:02:07Z</dc:date>
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