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    <title>MCUXpresso SDKのトピックFlexSPI Parallel Mode 2 QSPI flashes</title>
    <link>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1511087#M3888</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I have a question regarding using FlexSPI in parallel mode. I have 2 identical 8MB flashes (Winbond W25Q64JV) hooked up using QSPI on Port A1 and Port B1. The question is, does this make both flashes addressable? Meaning Port A1 is address range 6000_0000 ~ 6080_0000 and Port B1 is 6080_0000 ~ 6100_0000? When do I set bit 31 on register&amp;nbsp;IPCR1? Does it need to be set before every every transfer, or is setup beforehand? In parallel mode, are both chip selects used?&lt;/P&gt;&lt;P&gt;It is important to note, Port A1 is running XIP and Port B1 is used as a data flash.&lt;/P&gt;&lt;P&gt;Dave&lt;/P&gt;</description>
    <pubDate>Wed, 24 Aug 2022 16:53:33 GMT</pubDate>
    <dc:creator>Dave_Cogley</dc:creator>
    <dc:date>2022-08-24T16:53:33Z</dc:date>
    <item>
      <title>FlexSPI Parallel Mode 2 QSPI flashes</title>
      <link>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1511087#M3888</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I have a question regarding using FlexSPI in parallel mode. I have 2 identical 8MB flashes (Winbond W25Q64JV) hooked up using QSPI on Port A1 and Port B1. The question is, does this make both flashes addressable? Meaning Port A1 is address range 6000_0000 ~ 6080_0000 and Port B1 is 6080_0000 ~ 6100_0000? When do I set bit 31 on register&amp;nbsp;IPCR1? Does it need to be set before every every transfer, or is setup beforehand? In parallel mode, are both chip selects used?&lt;/P&gt;&lt;P&gt;It is important to note, Port A1 is running XIP and Port B1 is used as a data flash.&lt;/P&gt;&lt;P&gt;Dave&lt;/P&gt;</description>
      <pubDate>Wed, 24 Aug 2022 16:53:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1511087#M3888</guid>
      <dc:creator>Dave_Cogley</dc:creator>
      <dc:date>2022-08-24T16:53:33Z</dc:date>
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    <item>
      <title>Re: FlexSPI Parallel Mode 2 QSPI flashes</title>
      <link>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1511339#M3889</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205477"&gt;@Dave_Cogley&lt;/a&gt;&amp;nbsp;,&lt;BR /&gt;Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.&lt;BR /&gt;Before answering your question, I think I'd like to know more information, so whether you can share the schematic of the FlexSPI connection.&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Thu, 25 Aug 2022 01:51:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1511339#M3889</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2022-08-25T01:51:25Z</dc:date>
    </item>
    <item>
      <title>Re: FlexSPI Parallel Mode 2 QSPI flashes</title>
      <link>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1512487#M3895</link>
      <description>&lt;P&gt;Sorry for the delay. As you can see U12 is the XIP flash and U17 is the DATA flash.&lt;/P&gt;</description>
      <pubDate>Fri, 26 Aug 2022 16:16:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1512487#M3895</guid>
      <dc:creator>Dave_Cogley</dc:creator>
      <dc:date>2022-08-26T16:16:40Z</dc:date>
    </item>
    <item>
      <title>Re: FlexSPI Parallel Mode 2 QSPI flashes</title>
      <link>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1512881#M3896</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;Thanks for your reply.&lt;BR /&gt;According to your schematic and purpose, it should use the individual mode device connection to connect the two QSPI flashes (W25Q64JV), the FlexSPI1 Parallel Mode Device Connection is not suitable.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jeremyzhou_0-1661752056052.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/191552i451562DB55D2D284/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jeremyzhou_0-1661752056052.png" alt="jeremyzhou_0-1661752056052.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Mon, 29 Aug 2022 05:48:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-SDK/FlexSPI-Parallel-Mode-2-QSPI-flashes/m-p/1512881#M3896</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2022-08-29T05:48:08Z</dc:date>
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