MCUXpresso SDK中的主题 Flexbus setting up chip selects

Flexbus setting up chip selects

inorman — Tue, 29 Jan 2019 15:54:52 GMT

Hi All,

Could someone give me some guidance on how to set up the chip selects for the flexbus? I've managed to get things running using the code from the example as follows

flexbus_config_t flexbusUserConfig;

    /* Get default config */
    /*
     * flexbusUserConfig.writeProtect = 0;
     * flexbusUserConfig.burstWrite = 0;
     * flexbusUserConfig.burstRead = 0;
     * flexbusUserConfig.byteEnableMode = 0;
     * flexbusUserConfig.autoAcknowledge = true;
     * flexbusUserConfig.extendTransferAddress = 0;
     * flexbusUserConfig.secondaryWaitStates = 0;
     * flexbusUserConfig.byteLaneShift = kFLEXBUS_NotShifted;
     * flexbusUserConfig.writeAddressHold = kFLEXBUS_Hold1Cycle;
     * flexbusUserConfig.readAddressHold = kFLEXBUS_Hold1Or0Cycles;
     * flexbusUserConfig.addressSetup = kFLEXBUS_FirstRisingEdge;
     * flexbusUserConfig.portSize = kFLEXBUS_1Byte;
     * flexbusUserConfig.group1MultiplexControl = kFLEXBUS_MultiplexGroup1_FB_ALE;
     * flexbusUserConfig.group2MultiplexControl = kFLEXBUS_MultiplexGroup2_FB_CS4;
     * flexbusUserConfig.group3MultiplexControl = kFLEXBUS_MultiplexGroup3_FB_CS5;
     * flexbusUserConfig.group4MultiplexControl = kFLEXBUS_MultiplexGroup4_FB_TBST;
     * flexbusUserConfig.group5MultiplexControl = kFLEXBUS_MultiplexGroup5_FB_TA;
     */

    FLEXBUS_GetDefaultConfig(&flexbusUserConfig); //as above
    flexbusUserConfig.chipBaseAddress = 0x60000000U;
    flexbusUserConfig.chipBaseAddressMask = 0x7U;

FLEXBUS_Init(FB, &flexbusUserConfig);

which is working fine on CS0. If I alter the configuration to the following

flexbusUserConfig.chipBaseAddress = 0x60000000U;
flexbusUserConfig.chipBaseAddressMask = 0x7U;
flexbusUserConfig.group5MultiplexControl= kFLEXBUS_MultiplexGroup5_FB_CS3;

I still see CS0 toggling instead of CS3.

Chip select 3 has been setup through the pin mux tool to be assigned to the flexbus, and I can see it is set as such in pin_mux.c to kPORT_MuxAlt5

How should I be setting up the chip selects and memory space?

Kind regards

Ian

Re: Flexbus setting up chip selects

inorman — Wed, 30 Jan 2019 14:47:43 GMT

After digging a bit deeper it seems the drivers as provided aren't setup to initialise more then one chip select so I've added my own code after running FLEXBUS_Init so I now have,

flexbus_config_t flexbusUserConfig;

FLEXBUS_GetDefaultConfig(&flexbusUserConfig);

    flexbusUserConfig.chip=0;
    flexbusUserConfig.chipBaseAddress = 0x60000000U;
    flexbusUserConfig.chipBaseAddressMask = 0x7U;
    flexbusUserConfig.group5MultiplexControl= kFLEXBUS_MultiplexGroup5_FB_CS3;

FLEXBUS_Init(FB, &flexbusUserConfig); /* Reset FlexBUS to default satus*/

    // Set default base address for chip select 3
    FB->CS[3].CSAR = 0x70000000U;
    // Set mask for 512K
    FB->CS[3].CSMR = 0x7U<< FB_CSMR_BAM_SHIFT;
   //set for 8bit port, right aligned, ALE for one cycle and AA set for CS3 as per datasheet

FB->CS[3].CSCR=FB_CSCR_PS(1) | FB_CSCR_EXTS(1) | FB_CSCR_BLS(1)| FB_CSCR_AA(1);

However the processor hangs when I try to read or write from the CS3 space using

//Write data to MRAM

(*(uint32_t *)(0x70000000)) = 1;

// Read data to MRAM
memtmp=(*(uint32_t *)(0x70000001));

I can still read/write from CS0 using the address 0x60000000 ok.

Any ideas what steps I'm missing with CS3?

Cheers

Ian

Re: Flexbus setting up chip selects

inorman — Thu, 31 Jan 2019 17:00:51 GMT

For anyone searching for this later on I found the issue was not setting the valid bit on the extra chip selects CSMR register. Now I have both chip selects working. Final code is as follows..

flexbus_config_t flexbusUserConfig;

FLEXBUS_GetDefaultConfig(&flexbusUserConfig);

flexbusUserConfig.chip=0;

flexbusUserConfig.chipBaseAddress = 0x60000000U;
flexbusUserConfig.chipBaseAddressMask = 0x7U;
flexbusUserConfig.group5MultiplexControl= kFLEXBUS_MultiplexGroup5_FB_CS3;

FLEXBUS_Init(FB, &flexbusUserConfig); /* update with above settings*/

    // Set default base address for chip select 3
    FB->CS[3].CSAR = 0x70000000U;
    // Set mask address
    FB->CS[3].CSMR = 0x7U<< FB_CSMR_BAM_SHIFT | FB_CSMR_V_MASK;
//set for 8bit port, right aligned, ALE for one cycle

FB->CS[3].CSCR=FB_CSCR_PS(1) | FB_CSCR_EXTS(1) | FB_CSCR_BLS(1)| FB_CSCR_AA(1);

Then to read and write at those addresses with just 8 bits

// Write data to MRAM for CS0
(*(uint8_t *)(0x60000000)) = 1;

// Read data from CS0
memtmp=(*(uint8_t *)(0x60000001));

// Write data to MRAM for CS3
(*(uint8_t *)(0x70000000)) = 1;

// Read data from CS3
memtmp=(*(uint8_t *)(0x70000001));