topic Re: CSI Interrupt status register CSI_CSISR, clear status in MCUXpresso IDE

CSI Interrupt status register CSI_CSISR, clear status

nanjun — Fri, 19 Mar 2021 10:08:36 GMT

Hello,

I am debuging the project csi_rgb565.

After interrupt occurs, in CSI_TransferHandleIRQ, I want to clear the status of Start of Frame by writing 1 by:

uint32_t csisr = CSI_REG_SR(base);

CSI_REG_SR(base)= csisr | CSI_CSISR_SOF_INT_MASK;

After excuting this line, the bit16 is still active "1" when I read out the value of CSI_REG_SR(base). Thus, during the next interrupt, this bit is still 1.

I think the interrupt of SOF should be less often than "CSI_CSISR_DMA_TSF_DONE_FB2_MASK" and "CSI_CSISR_DMA_TSF_DONE_FB1_MASK" since each frame needs multiple DMA transferring.

However, the user manual says "SOF_INT: Start of Frame Interrupt Status. Indicates when SOF is detected. (Cleared by writing 1)".

How can I manually clear this status of SOF? Is there anything wrong in the piece of code?

Thank you.

Re: CSI Interrupt status register CSI_CSISR, clear status

jingpan — Tue, 23 Mar 2021 07:22:47 GMT

Hi nanjun,

The original code is

uint32_t csisr = CSI_REG_SR(base); CSI_REG_SR(base) = csisr;

I add test code below it

if(CSI_REG_SR(base)&CSI_CSISR_SOF_INT_MASK) queueWriteIdx=1;

But I do not find any problem. SOF bit is cleared.

If you count SOF number and DMA_TSF_DONE_FBx number, you'll find SOF=DMA_TSF_DONE_FB1+DMA_TSF_DONE_FB2.

Regards,

jing

Re: CSI Interrupt status register CSI_CSISR, clear status

nanjun — Tue, 23 Mar 2021 07:34:34 GMT

Hello Jing,

thanks for your reply.

I think the problem is caused by debuging since the cnt showing entering SOF is not updated correctly when the code is ran step by step. But we I try a loop of 100, it updates as desired.

Coud you explain it to me shortly? Why do we write back the SR register value immediately after we just read it from SR?

uint32_t csisr = CSI_REG_SR(base);

CSI_REG_SR(base) = csisr

Re: CSI Interrupt status register CSI_CSISR, clear status

jingpan — Wed, 24 Mar 2021 08:39:39 GMT

Hi,

No other special reason. Since the value has been read out, clear all the bit in the register make code simple and clean.

Regards,

Jing