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    <title>topic Re: Can't debug code link to RAM with Jlink in MCUXpresso IDE</title>
    <link>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1238694#M6754</link>
    <description>&lt;P&gt;Hello Jing,&lt;/P&gt;&lt;P&gt;Thank you so much for your help!!&lt;/P&gt;&lt;P&gt;As I expected, it was a debug configuration problem. The Initialize CPU registers checkbox was checked. Once unchecked, it worked fine.&lt;/P&gt;&lt;P&gt;Your the best !&lt;/P&gt;&lt;P&gt;Hugo&lt;/P&gt;</description>
    <pubDate>Tue, 02 Mar 2021 12:43:32 GMT</pubDate>
    <dc:creator>h_bouchard</dc:creator>
    <dc:date>2021-03-02T12:43:32Z</dc:date>
    <item>
      <title>Can't debug code link to RAM with Jlink</title>
      <link>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1237384#M6746</link>
      <description>&lt;P&gt;I am using the rt1064 on a custom board (SDK version 2.9.1) and debugging using MCUXpresso IDE v11.3.0. I would like to link application to RAM but I'm not able to debug with Segger JLink Ultra+ probe.&lt;/P&gt;&lt;P&gt;To accomplish this, I did the following:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Set up SRAM_ITC to be the first RAM region listed in the memory configuration table (this region is large enough to hold our application).&lt;/LI&gt;&lt;LI&gt;Set up the SRAM_DTC to placed the heap and stack there.&lt;/LI&gt;&lt;LI&gt;Checked the "Link application to RAM" checkbox in the managed linker script.&lt;/LI&gt;&lt;LI&gt;In the Startup tab of the&amp;nbsp;'Edit Launch Configuration' dialog, set "monitor reset 6" to "Initialization Commands".&lt;/LI&gt;&lt;LI&gt;Remove XIP from SDK setup.&lt;/LI&gt;&lt;LI&gt;Remove XIP preprocessor defines from project settings.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;When I try to download this through the debugger, the behavior is not stable. The first time I get this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-SPOILER&gt;&lt;P&gt;[26-2-2021 06:00:41] Executing Server: "C:\Program Files (x86)\SEGGER\JLink\JLinkGDBServerCL.exe" -nosilent -swoport 2332 -select USB=504505558 -telnetport 2333 -endian little -ir -speed auto -port 2331 -vd -device MIMXRT1064xxx6A -if SWD -halt -reportuseraction&lt;BR /&gt;SEGGER J-Link GDB Server V6.88c Command Line Version&lt;/P&gt;&lt;P&gt;JLinkARM.dll V6.88c (DLL compiled Dec 4 2020 18:05:56)&lt;/P&gt;&lt;P&gt;Command line: -nosilent -swoport 2332 -select USB=504505558 -telnetport 2333 -endian little -ir -speed auto -port 2331 -vd -device MIMXRT1064xxx6A -if SWD -halt -reportuseraction&lt;BR /&gt;-----GDB Server start settings-----&lt;BR /&gt;GDBInit file: none&lt;BR /&gt;GDB Server Listening port: 2331&lt;BR /&gt;SWO raw output listening port: 2332&lt;BR /&gt;Terminal I/O port: 2333&lt;BR /&gt;Accept remote connection: localhost only&lt;BR /&gt;Generate logfile: off&lt;BR /&gt;Verify download: on&lt;BR /&gt;Init regs on start: on&lt;BR /&gt;Silent mode: off&lt;BR /&gt;Single run mode: off&lt;BR /&gt;Target connection timeout: 0 ms&lt;BR /&gt;------J-Link related settings------&lt;BR /&gt;J-Link Host interface: USB&lt;BR /&gt;J-Link script: none&lt;BR /&gt;J-Link settings file: none&lt;BR /&gt;------Target related settings------&lt;BR /&gt;Target device: MIMXRT1064xxx6A&lt;BR /&gt;Target interface: SWD&lt;BR /&gt;Target interface speed: auto&lt;BR /&gt;Target endian: little&lt;/P&gt;&lt;P&gt;Connecting to J-Link...&lt;BR /&gt;J-Link is connected.&lt;BR /&gt;Device "MIMXRT1064XXX6A" selected.&lt;BR /&gt;Firmware: J-Link Ultra V4 compiled Nov 12 2020 10:07:39&lt;BR /&gt;Hardware: V4.00&lt;BR /&gt;S/N: 504505558&lt;BR /&gt;Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB&lt;BR /&gt;Checking target voltage...&lt;BR /&gt;Target voltage: 3.30 V&lt;BR /&gt;Listening on TCP/IP port 2331&lt;BR /&gt;Connecting to target...&lt;BR /&gt;InitTarget() start&lt;BR /&gt;InitTarget()&lt;BR /&gt;_TargetHalt: CPU halted&lt;BR /&gt;InitTarget() end&lt;BR /&gt;Found SW-DP with ID 0x0BD11477&lt;BR /&gt;DPIDR: 0x0BD11477&lt;BR /&gt;Scanning AP map to find all available APs&lt;BR /&gt;AP[1]: Stopped AP scan as end of AP map has been reached&lt;BR /&gt;AP[0]: AHB-AP (IDR: 0x04770041)&lt;BR /&gt;Iterating through AP map to find AHB-AP to use&lt;BR /&gt;AP[0]: Core found&lt;BR /&gt;AP[0]: AHB-AP ROM base: 0xE00FD000&lt;BR /&gt;CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)&lt;BR /&gt;Found Cortex-M7 r1p1, Little endian.&lt;BR /&gt;FPUnit: 8 code (BP) slots and 0 literal slots&lt;BR /&gt;CoreSight components:&lt;BR /&gt;ROMTbl[0] @ E00FD000&lt;BR /&gt;ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table&lt;BR /&gt;ROMTbl[1] @ E00FE000&lt;BR /&gt;ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table&lt;BR /&gt;ROMTbl[2] @ E00FF000&lt;BR /&gt;ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7&lt;BR /&gt;ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT&lt;BR /&gt;ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7&lt;BR /&gt;ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM&lt;BR /&gt;ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7&lt;BR /&gt;ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 CTI&lt;BR /&gt;ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU-M7&lt;BR /&gt;ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG&lt;BR /&gt;Cache: Separate I- and D-cache.&lt;/P&gt;&lt;P&gt;I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way&lt;BR /&gt;D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way&lt;BR /&gt;InitTarget() start&lt;BR /&gt;InitTarget()&lt;BR /&gt;_TargetHalt: CPU halted&lt;BR /&gt;InitTarget() end&lt;BR /&gt;Found SW-DP with ID 0x0BD11477&lt;BR /&gt;DPIDR: 0x0BD11477&lt;BR /&gt;AP map detection skipped. Manually configured AP map found.&lt;BR /&gt;AP[0]: AHB-AP (IDR: Not set)&lt;BR /&gt;AP[0]: Core found&lt;BR /&gt;AP[0]: AHB-AP ROM base: 0xE00FD000&lt;BR /&gt;CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)&lt;BR /&gt;Found Cortex-M7 r1p1, Little endian.&lt;BR /&gt;FPUnit: 8 code (BP) slots and 0 literal slots&lt;BR /&gt;CoreSight components:&lt;BR /&gt;ROMTbl[0] @ E00FD000&lt;BR /&gt;ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table&lt;BR /&gt;ROMTbl[1] @ E00FE000&lt;BR /&gt;ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table&lt;BR /&gt;ROMTbl[2] @ E00FF000&lt;BR /&gt;ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7&lt;BR /&gt;ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT&lt;BR /&gt;ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7&lt;BR /&gt;ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM&lt;BR /&gt;ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7&lt;BR /&gt;ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 CTI&lt;BR /&gt;ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU-M7&lt;BR /&gt;ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG&lt;BR /&gt;Cache: Separate I- and D-cache.&lt;/P&gt;&lt;P&gt;I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way&lt;BR /&gt;D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way&lt;BR /&gt;Connected to target&lt;BR /&gt;Waiting for GDB connection...Connected to 127.0.0.1&lt;BR /&gt;Reading all registers&lt;BR /&gt;Read 4 bytes @ address 0x00000000 (Data = 0x00000000)&lt;BR /&gt;Read 4 bytes @ address 0x00000000 (Data = 0x00000000)&lt;BR /&gt;Read 4 bytes @ address 0x00000000 (Data = 0x00000000)&lt;BR /&gt;Connected to 127.0.0.1&lt;BR /&gt;Reading all registers&lt;BR /&gt;Read 4 bytes @ address 0x00000000 (Data = 0x00000000)&lt;BR /&gt;Read 4 bytes @ address 0x00000000 (Data = 0x00000000)&lt;BR /&gt;Read 4 bytes @ address 0x00000000 (Data = 0x00000000)&lt;BR /&gt;GDB closed TCP/IP connection (Socket 1056)&lt;BR /&gt;GDB closed TCP/IP connection (Socket 1064)&lt;/P&gt;&lt;P&gt;Server has been shut down.&lt;/P&gt;&lt;/LI-SPOILER&gt;&lt;P&gt;But the second time I try to debug I get this:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-SPOILER&gt;&lt;P&gt;C:&lt;BR /&gt;xp\MCUXpressoIDE_11.3.0_5222\ide\plugins\com.nxp.mcuxpresso.tools.win32_11.3.0.202008311133 ools&amp;#8;in&amp;#7;rm-none-eabi-gdb.exe: warning: Couldn't determine a path for the index cache directory.&lt;BR /&gt;GNU gdb (GNU Arm Embedded Toolchain 9-2020-q2-update) 8.3.1.20191211-git&lt;BR /&gt;Copyright (C) 2019 Free Software Foundation, Inc.&lt;BR /&gt;License GPLv3+: GNU GPL version 3 or later &amp;lt;&lt;A href="http://gnu.org/licenses/gpl.html" target="_blank" rel="noopener"&gt;http://gnu.org/licenses/gpl.html&lt;/A&gt;&amp;gt;&lt;BR /&gt;This is free software: you are free to change and redistribute it.&lt;BR /&gt;There is NO WARRANTY, to the extent permitted by law.&lt;BR /&gt;Type "show copying" and "show warranty" for details.&lt;BR /&gt;This GDB was configured as "--host=i686-w64-mingw32 --target=arm-none-eabi".&lt;BR /&gt;Type "show configuration" for configuration details.&lt;BR /&gt;For bug reporting instructions, please see:&lt;BR /&gt;&amp;lt;&lt;A href="http://www.gnu.org/software/gdb/bugs/" target="_blank" rel="noopener"&gt;http://www.gnu.org/software/gdb/bugs/&lt;/A&gt;&amp;gt;.&lt;BR /&gt;Find the GDB manual and other documentation resources online at:&lt;BR /&gt;&amp;lt;&lt;A href="http://www.gnu.org/software/gdb/documentation/" target="_blank" rel="noopener"&gt;http://www.gnu.org/software/gdb/documentation/&lt;/A&gt;&amp;gt;.&lt;/P&gt;&lt;P&gt;For help, type "help".&lt;BR /&gt;Type "apropos word" to search for commands related to "word"&lt;/P&gt;&lt;/LI-SPOILER&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The question is, am I missing any settings?&lt;/P&gt;&lt;P&gt;Thanks for your help!&lt;/P&gt;&lt;P&gt;Hugo&lt;/P&gt;</description>
      <pubDate>Fri, 26 Feb 2021 17:33:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1237384#M6746</guid>
      <dc:creator>h_bouchard</dc:creator>
      <dc:date>2021-02-26T17:33:38Z</dc:date>
    </item>
    <item>
      <title>Re: Can't debug code link to RAM with Jlink</title>
      <link>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1237961#M6748</link>
      <description>&lt;P&gt;I just tried with Ozone (Segger GUI for debugging) and I managed to start debugging my application. So the code is link to RAM properly.&lt;/P&gt;&lt;P&gt;It is most likely a faulty debug configuration. Does someone has managed to debug an application link to RAM with a JLink probe and MCUXpresso?&lt;/P&gt;&lt;P&gt;Thanks&lt;BR /&gt;Hugo&lt;/P&gt;</description>
      <pubDate>Mon, 01 Mar 2021 13:12:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1237961#M6748</guid>
      <dc:creator>h_bouchard</dc:creator>
      <dc:date>2021-03-01T13:12:01Z</dc:date>
    </item>
    <item>
      <title>Re: Can't debug code link to RAM with Jlink</title>
      <link>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1237964#M6749</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;You need to modify the debugger connect script (.SCP file) to reflect the changed flexRAM configuration. Did you do that?&lt;/P&gt;&lt;P&gt;-Nick&lt;/P&gt;</description>
      <pubDate>Mon, 01 Mar 2021 13:28:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1237964#M6749</guid>
      <dc:creator>nickwallis</dc:creator>
      <dc:date>2021-03-01T13:28:39Z</dc:date>
    </item>
    <item>
      <title>Re: Can't debug code link to RAM with Jlink</title>
      <link>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1238096#M6751</link>
      <description>&lt;P&gt;Hi Nick,&lt;/P&gt;&lt;P&gt;Thanks for the reply but the flexRAM setting hasn't change therefore no need to modify .scp file.&lt;/P&gt;&lt;P&gt;Hugo&lt;/P&gt;</description>
      <pubDate>Mon, 01 Mar 2021 17:01:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1238096#M6751</guid>
      <dc:creator>h_bouchard</dc:creator>
      <dc:date>2021-03-01T17:01:24Z</dc:date>
    </item>
    <item>
      <title>Re: Can't debug code link to RAM with Jlink</title>
      <link>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1238449#M6753</link>
      <description>&lt;P&gt;Hi h_bouchard,&lt;/P&gt;
&lt;P&gt;I made a example which use jlink and run in sram. Please take a try.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Jing&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 02 Mar 2021 06:15:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1238449#M6753</guid>
      <dc:creator>jingpan</dc:creator>
      <dc:date>2021-03-02T06:15:02Z</dc:date>
    </item>
    <item>
      <title>Re: Can't debug code link to RAM with Jlink</title>
      <link>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1238694#M6754</link>
      <description>&lt;P&gt;Hello Jing,&lt;/P&gt;&lt;P&gt;Thank you so much for your help!!&lt;/P&gt;&lt;P&gt;As I expected, it was a debug configuration problem. The Initialize CPU registers checkbox was checked. Once unchecked, it worked fine.&lt;/P&gt;&lt;P&gt;Your the best !&lt;/P&gt;&lt;P&gt;Hugo&lt;/P&gt;</description>
      <pubDate>Tue, 02 Mar 2021 12:43:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MCUXpresso-IDE/Can-t-debug-code-link-to-RAM-with-Jlink/m-p/1238694#M6754</guid>
      <dc:creator>h_bouchard</dc:creator>
      <dc:date>2021-03-02T12:43:32Z</dc:date>
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