MCUXpresso GeneralのトピックRe: SRAM status during power-down mode cortex m0+

SRAM status during power-down mode cortex m0+

vasi_alex_92 — Fri, 08 Feb 2019 14:51:11 GMT

I'm using an LPC804 cortex m0+, and in datasheet is written the microprocessor holds SRAM and registers status in power-down mode, but every time when I use WFI to enter in power-down mode, it wakes up and starts again to execute the main function from the beginning (in main I have an init function and an infinite looper).

I want to ask you if when the microprocessor wakes up from power-down mode continues its execution from last command __WFI and after in IRQHandler, because that's what I understand from datasheet?

Thanks,

Re: SRAM status during power-down mode cortex m0+

ZhangJennie — Thu, 14 Feb 2019 10:39:20 GMT

Hi Alex,

the description in your screenshot is correct.

I ever tested wake up by WKT, WAKE pin, the program went back to the place where it entered power down mode. while if you wake up code by reset, the code will be executed from start. Please check how you wake up the MCU.

LPC804 has 4 low power mode, only waking up from deep power down mode resets the chip. Please check PCON->PM register, make use its value is 2.

to shoot the trouble, I suggust you test wake up feature with WAKE pin, it's easy.

Or you can use MCUXpresso SDK demo code power_mode_switch_lpc to test wake up feature.

Have a great day,
Jun Zhang

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Re: SRAM status during power-down mode cortex m0+

vasi_alex_92 — Thu, 14 Feb 2019 12:29:21 GMT

Hi Zhang,

Thank you for your answer.

I use an interrupt pin for wake up, set in STARTERP0 register and I use __WFI() to enter in power down mode. I observed that if use __WFE() to enter in power down, the program went back to the place where it entered but I have to use wait for interrupt instruction for my application.

I check PCON->PM register and is on 0x02, but i also write 1 in PCON->NODPD reg to prevent entering in deep power down.

My opinion is that the processor take a reset after it receive the interrupt, but i don't know why yet.

Regards,

Alexandru Vasi

Re: SRAM status during power-down mode cortex m0+

ZhangJennie — Fri, 15 Feb 2019 11:08:00 GMT

Hi Alex,

Writing 1 in PCON->NODPD reg is not necessary but it should not cause wake up reset. From your description, I can't find anywhere abnormal.

Maybe we use different board and different project, thus I can't reproduce your issue.

with this remote support, we need have a criterion to identify the problem on SW or HW. Thus please use MCUXpresso SDK demo code power_mode_switch_lpc, Wakeup pin wakeup, to test it. If the demo code works well, you can check your code with referring the demo.

Have a great day,
Jun Zhang

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