MCUXpresso GeneralのトピックRe: Multicore slave - Statics not initialised

Multicore slave - Statics not initialised

AndyCapon — Sat, 23 Mar 2019 09:43:55 GMT

Hi Guys,

I have a LPCXpresso55S69 board here.

I have a Master/Slave project set up, statics in the Slave project are not initialised.

Has anyone any ideas?

Cheers

Andy

Re: Multicore slave - Statics not initialised

AndyCapon — Sat, 23 Mar 2019 21:19:11 GMT

A bit more info, it seems there is initialisation but it is all shifted by -4 bytes:

Re: Multicore slave - Statics not initialised

AndyCapon — Sun, 24 Mar 2019 15:59:59 GMT

Some more info:

For C projects this only happens when using NewLib. NewlibNano and Redlib work fine so far in testing.

For C++ projects it happens in both NewLib and NewLibNano.

The offset is not always -4 bytes, seems to be maybe dependent on code or data size.

Re: Multicore slave - Statics not initialised

ZhangJennie — Wed, 27 Mar 2019 03:44:51 GMT

HI Andrew,

I tested static variable in SLAVE with newlib but didn't find problem.

Can you please check my video?

How to reproduce your issue?

Have a great day,
Jun Zhang

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Re: Multicore slave - Statics not initialised

AndyCapon — Wed, 27 Mar 2019 05:50:41 GMT

Hi Jun Zhang,

Thanks very much for the reply.

Unfortunately it is not working like that here.

I have attached a zip with a master/slave project I just created which has the issue, is it possible for you to test it out there?

Many thanks

Andy

StaticIssue.zip

Re: Multicore slave - Statics not initialised

ZhangJennie — Wed, 27 Mar 2019 07:42:50 GMT

Hi Andrew,

I tried download your project. but dropbox is blocked from my side. Thus I can't get your project.

I am attaching my project in this reply. Can you please test it instead?

How it words on your side?

I use MCUxpresso IDE v10.3.0

Have a great day,
Jun Zhang

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Re: Multicore slave - Statics not initialised

AndyCapon — Wed, 27 Mar 2019 08:58:56 GMT

（マイビデオを表示）

Hi Jun Zhang,

Thanks for the workspace file, I imported the projects and everything works fine.

I then changed the memory map to be the same as I am using and everything still worked fine.

I have attached a video of the problem here when setting up a Master/Slave project to show you what happens.

Many thanks

Andy

p.s. IDE is 10.3.1 [Build 2233], SDK is 2.5.0

Re: Multicore slave - Statics not initialised

AndyCapon — Wed, 27 Mar 2019 17:15:52 GMT

And some more info:

I just did a clean install of the IDE and sdk on a windows machine to test if this was an OS X issue.

I created the Master/Slave and get exactly the same problem as shown in the video I posted above.

So the problem is there on OS X and Windows.

Re: Multicore slave - Statics not initialised

ZhangJennie — Thu, 28 Mar 2019 09:17:43 GMT

Hi Andrew,

I use the same IDE and SDK versions as yours

I wonder if you didn't set up the RAM connection between two cores.

I suggest you follow this document to create new Slave and master project.

Make sure you build slave first then master.

Have a great day,
Jun Zhang

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Re: Multicore slave - Statics not initialised

AndyCapon — Thu, 28 Mar 2019 09:27:05 GMT

Hi Jun Zhang,

Could you please look at the video I posted above, it shows me following the exact steps to create the projects.

Many thanks

Andy

Re: Multicore slave - Statics not initialised

ZhangJennie — Thu, 28 Mar 2019 09:46:56 GMT

Hi Andy,

I am not in office so I can't test your issue with a board.

I found one difference from you video, comparing with the manual. The link section is section name but not Alas. please check if this is the issue.

Besides, make sure you build the slave project before the master project. it's important.

In order to check if the problem is due to the OS, please use the document to create two projects. I used it too. Thus we can check if have the same result.

I use 64bit win10.

If any new findings, update me here. I will check it once I get to office.

Have a nice day

Jun Zhang

Re: Multicore slave - Statics not initialised

AndyCapon — Thu, 28 Mar 2019 10:30:50 GMT

Hi Jun Zhang,

Thanks very much for looking at the video.

Creating a new C master/slave Project with SRAMX instead of RAM2, statics worked.

Next test was to use newlib semihost, this will not fit into SRAMX so I created a split Ram, with core 2 using 0x20022000.

I first created the slave and built it.

Then when creating the Master you are not able to choose based on the name of the memory only the alias:

So I then went in and changed it in the settings:

When build this also suffers from the statics being offset by 4 bytes.

I wonder if it is possible for you to set-up this test?

Many thanks

Andy

Re: Multicore slave - Statics not initialised

AndyCapon — Thu, 28 Mar 2019 17:36:43 GMT

I just downloaded the IDE 10.3.0 [Build 2200]

With this version I have tested both a C and C++ project Master/Slave with newlib Semihost, with this version statics are initialised correctly.

So the incorrectly initialised statics seems to be an issue introduced with 10.3.1

Re: Multicore slave - Statics not initialised

AndyCapon — Fri, 29 Mar 2019 07:51:59 GMT

I spoke too soon, once you start adding code the static initialisation goes wrong again.

I added McMgr and RPMsg-Lite to the slave project in 10.3.0 and the statics are then initialised wrong.

For me this board with multi core in MCUXpresso is pretty broken!

Re: Multicore slave - Statics not initialised

AndyCapon — Sat, 30 Mar 2019 08:15:53 GMT

Ok here is the issue:

This example is using 0x20022000 as the slave address.

If we look at the section headers for the slave axf we get:

arm-none-eabi-readelf -S TestStaticC_M33SLAVE.axf
There are 23 section headers, starting at offset 0xee538:

Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[ 1] .text PROGBITS 20022000 002000 0044f4 00 AX 0 0 4
[ 2] .data PROGBITS 20026500 006500 0009b4 00 WA 0 0 8
[ 3] .bss NOBITS 20026eb4 006eb4 000130 00 WA 0 0 4
[ 4] .ARM.exidx ARM_EXIDX 200264f4 0064f4 000008 00 AL 1 0 4
[ 5] .uninit_RESERVED PROGBITS 200264fc 006eb4 000000 00 W 0 0 4
[ 6] .noinit PROGBITS 20026fe4 006eb4 000000 00 W 0 0 4
[ 7] .heap NOBITS 20026fe4 006eb4 001000 00 WA 0 0 4
[ 8] .heap2stackfill NOBITS 20027fe4 006eb4 001000 00 WA 0 0 1
[ 9] .stack PROGBITS 20043000 006eb4 000000 00 W 0 0 4
[10] .debug_info PROGBITS 00000000 006eb4 00d06a 00 0 0 1
[11] .debug_abbrev PROGBITS 00000000 013f1e 001420 00 0 0 1
[12] .debug_aranges PROGBITS 00000000 01533e 000560 00 0 0 1
[13] .debug_ranges PROGBITS 00000000 01589e 0004d0 00 0 0 1
[14] .debug_macro PROGBITS 00000000 015d6e 001194 00 0 0 1
[15] .debug_line PROGBITS 00000000 016f02 002b6d 00 0 0 1
[16] .debug_str PROGBITS 00000000 019a6f 0ce368 01 MS 0 0 1
[17] .comment PROGBITS 00000000 0e7dd7 00007f 01 MS 0 0 1
[18] .ARM.attributes ARM_ATTRIBUTES 00000000 0e7e56 000032 00 0 0 1
[19] .debug_frame PROGBITS 00000000 0e7e88 001f34 00 0 0 4
[20] .symtab SYMTAB 00000000 0e9dbc 002d40 10 21 440 4
[21] .strtab STRTAB 00000000 0ecafc 00194c 00 0 0 1
[22] .shstrtab STRTAB 00000000 0ee448 0000ee 00 0 0 1
Key to Flags:
W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
L (link order), O (extra OS processing required), G (group), T (TLS),
C (compressed), x (unknown), o (OS specific), E (exclude),
y (purecode), p (processor specific)

We can see our .Text at 0x20022000 and our .data at 0x20026500

Now if we look at the master:

arm-none-eabi-readelf -S TestStaticC_MASTER.axf
There are 33 section headers, starting at offset 0x14d6a0:

Section Headers:
[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[ 1] .text PROGBITS 00000000 010000 0093ec 00 AX 0 0 8
[ 2] .data PROGBITS 20000000 030000 0009ac 00 WA 0 0 8
[ 3] .data_RAM2_core_m PROGBITS 20022000 022000 0044f4 00 AX 0 0 4
[ 4] .data_RAM2_core_m ARM_EXIDX 200264f4 0264f4 000008 00 AL 3 0 4
[ 5] .data_RAM2_core_m PROGBITS 200264fc 0264fc 0009b4 00 WA 0 0 8
[ 6] .data_RAM2 PROGBITS 20026eb0 0309ac 000000 00 W 0 0 4
[ 7] .data_RAM3 PROGBITS 04000000 0309ac 000000 00 W 0 0 4
[ 8] .data_RAM4 PROGBITS 40100000 0309ac 000000 00 W 0 0 4
[ 9] .bss NOBITS 200009ac 0309ac 000150 00 WA 0 0 4
[10] .ARM.exidx ARM_EXIDX 000093ec 0193ec 000008 00 AL 1 0 4
[11] .uninit_RESERVED PROGBITS 20000000 0309ac 000000 00 W 0 0 4
[12] .noinit_RAM2 PROGBITS 20026eb0 0309ac 000000 00 W 0 0 4
[13] .noinit_RAM3 PROGBITS 04000000 0309ac 000000 00 W 0 0 4
[14] .noinit_RAM4 PROGBITS 40100000 0309ac 000000 00 W 0 0 4
[15] .noinit PROGBITS 20000afc 0309ac 000000 00 W 0 0 4
[16] .heap NOBITS 20000afc 0309ac 001000 00 WA 0 0 4
[17] .heap2stackfill NOBITS 20001afc 0309ac 001000 00 WA 0 0 1
[18] .stack PROGBITS 20021000 0309ac 000000 00 W 0 0 4
[19] .debug_info PROGBITS 00000000 0309ac 019b5f 00 0 0 1
[20] .debug_abbrev PROGBITS 00000000 04a50b 002b34 00 0 0 1
[21] .debug_aranges PROGBITS 00000000 04d03f 000a38 00 0 0 1
[22] .debug_ranges PROGBITS 00000000 04da77 0009c8 00 0 0 1
[23] .debug_macro PROGBITS 00000000 04e43f 01934e 00 0 0 1
[24] .debug_line PROGBITS 00000000 06778d 006980 00 0 0 1
[25] .debug_str PROGBITS 00000000 06e10d 0d50bc 01 MS 0 0 1
[26] .comment PROGBITS 00000000 1431c9 00007f 01 MS 0 0 1
[27] .ARM.attributes ARM_ATTRIBUTES 00000000 143248 00003a 00 0 0 1
[28] .debug_frame PROGBITS 00000000 143284 003838 00 0 0 4
[29] .debug_loc PROGBITS 00000000 146abc 000a55 00 0 0 1
[30] .symtab SYMTAB 00000000 147514 003ee0 10 31 621 4
[31] .strtab STRTAB 00000000 14b3f4 00210c 00 0 0 1
[32] .shstrtab STRTAB 00000000 14d500 0001a0 00 0 0 1
Key to Flags:
W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
L (link order), O (extra OS processing required), G (group), T (TLS),
C (compressed), x (unknown), o (OS specific), E (exclude),
y (purecode), p (processor specific)
MP12:ide andrewcapon$ ./plugins/com.nxp.mcuxpresso.tools.macosx_10.3.0.201811011841/tools/bin/arm-none-eabi-readelf -S /Users/andrewcapon/Documents/MCUXpressoIDE_10.3.1/workspace/TestStaticC_M33SLAVE/Debug/TestStaticC_M33SLAVE.axf
There are 23 section headers, starting at offset 0xee538:

We can see that the .data_RAM2_core_m PROGBITS is correctly set to 0x20022000 for the slave .text.

The second .data_RAM2_core_m PROGBITS is incorrectly set to 0x200264fc instead of 0x20026500, 4 bytes out.

Re: Multicore slave - Statics not initialised

AndyCapon — Sat, 30 Mar 2019 08:31:20 GMT

So, I now add the following line to the Slave code to increase the .text size by 4 bytes:

__asm("NOP");

Now the sections line up in the axf files and statics are initialised correctly.

So the issue is with the .text size of the slave code, if the .text size is divisible by 8 everything works otherwise initialisation is incorrect.

Re: Multicore slave - Statics not initialised

AndyCapon — Sat, 30 Mar 2019 09:25:45 GMT

I looked at the LD files and the slave one looks fine, it is aligning to 4. The linker though is aligning to 8!

I have managed to bodge it to work by changing the linker script for the Master to align data_RAM2_core_m33slave_data to 8, now statics are initialised correctly irrespective of the slaves .text size.

This is obviously not the correct way of fixing it but at least gets me going, someone at NXP needs to look to see why the slaves data is aligned to 8 rather than 4.

Re: Multicore slave - Statics not initialised

AndyCapon — Sat, 30 Mar 2019 11:17:43 GMT

Now for a C++ project:

The slave has the following memory setup:

Memory region Used Size Region Size %age Used

SRAM_CODE: 56912 B 136 KB 40.87%

SRAMX: 0 GB 32 KB 0.00%

USB_RAM: 5808 B 16 KB 35.45%

Here we seem to need to align to 32 bytes in the master ld file for statics to be initialised correctly:

/* M33SLAVE data section */
 .data_RAM2_core_m33slave_data . : SUBALIGN(32)
 {
 FILL(0xff)
 KEEP(*(.core_m33slave.data_*)) KEEP(*(.core_m33slave.data))
 __core_m33slave_END__ = .; /* end of slave image */
/* perform some simple sanity checks */
 ASSERT(!(__core_m33slave_START__ == __core_m33slave_END__), "No slave code for _core_m33slave");
 ASSERT( (ABSOLUTE(__core_m33slave_START__) == __vectors_start___core_m33slave), "M33SLAVE execute address differs from address provided in source image");
 } > SRAM_CODE AT>PROGRAM_FLASH‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

The reason is that the slave is linked with a reserved section (.uninit_RESERVED PROGBITS) to align the .data to 32 bytes, here is the slave map file sorted by address:

[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[16] .debug_info PROGBITS 00000000 00d5b0 026da4 00 0 0 1
[17] .debug_abbrev PROGBITS 00000000 034354 004491 00 0 0 1
[18] .debug_aranges PROGBITS 00000000 0387e5 000d88 00 0 0 1
[19] .debug_ranges PROGBITS 00000000 03956d 000c08 00 0 0 1
[20] .debug_macro PROGBITS 00000000 03a175 01ec9c 00 0 0 1
[21] .debug_line PROGBITS 00000000 058e11 00ccb6 00 0 0 1
[22] .debug_str PROGBITS 00000000 065ac7 0e0922 01 MS 0 0 1
[23] .comment PROGBITS 00000000 1463e9 00007f 01 MS 0 0 1
[24] .ARM.attributes ARM_ATTRIBUTES 00000000 146468 000032 00 0 0 1
[25] .debug_frame PROGBITS 00000000 14649c 004318 00 0 0 4
[26] .symtab SYMTAB 00000000 14a7b4 004d60 10 27 787 4
[27] .strtab STRTAB 00000000 14f514 0032cc 00 0 0 1
[28] .shstrtab STRTAB 00000000 1527e0 000135 00 0 0 1
[ 3] .data_RAM2 PROGBITS 04000000 00d5b0 000000 00 W 0 0 4
[10] .noinit_RAM2 PROGBITS 04000000 00d5b0 000000 00 W 0 0 4
[ 1] .text PROGBITS 20022000 002000 00ac8c 00 AX 0 0 4
[ 6] .ARM.extab PROGBITS 2002cc8c 00cc8c 0002e8 00 A 0 0 4
[ 7] .ARM.exidx ARM_EXIDX 2002cf74 00cf74 0002b8 00 AL 1 0 4
[ 9] .uninit_RESERVED PROGBITS 2002d22c 00d5b0 000000 00 W 0 0 4
[ 2] .data PROGBITS 2002d240 00d240 000370 00 WA 0 0 64
[ 5] .bss NOBITS 2002d5c0 00d5b0 000890 00 WA 0 0 64
[12] .noinit PROGBITS 2002de50 00d5b0 000000 00 W 0 0 4
[13] .heap NOBITS 2002de50 00d5b0 001000 00 WA 0 0 4
[14] .heap2stackfill NOBITS 2002ee50 00d5b0 001000 00 WA 0 0 1
[15] .stack PROGBITS 20043000 00d5b0 000000 00 W 0 0 4
[ 8] .m_usb_data NOBITS 40100000 010000 0016b0 00 WA 0 0 256
[ 4] .data_RAM3 PROGBITS 401016b0 00d5b0 000000 00 W 0 0 4
[11] .noinit_RAM3 PROGBITS 401016b0 00d5b0 000000 00 W 0 0 4

We can see from the Master map file that this section is not taken into account so .data_RAM2_core_m33slave_data ends up taking the value of .uninit_RESERVED PROGBITS

[Nr] Name Type Addr Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[ 1] .text PROGBITS 00000000 010000 0057b4 00 AX 0 0 8
[21] .debug_info PROGBITS 00000000 030080 01e874 00 0 0 1
[22] .debug_abbrev PROGBITS 00000000 04e8f4 00355b 00 0 0 1
[23] .debug_aranges PROGBITS 00000000 051e4f 000988 00 0 0 1
[24] .debug_ranges PROGBITS 00000000 0527d7 0008a8 00 0 0 1
[25] .debug_macro PROGBITS 00000000 05307f 01cbf5 00 0 0 1
[26] .debug_line PROGBITS 00000000 06fc74 007b6b 00 0 0 1
[27] .debug_str PROGBITS 00000000 0777df 0d8835 01 MS 0 0 1
[28] .comment PROGBITS 00000000 150014 00007f 01 MS 0 0 1
[29] .ARM.attributes ARM_ATTRIBUTES 00000000 150093 00003a 00 0 0 1
[30] .debug_frame PROGBITS 00000000 1500d0 0030c0 00 0 0 4
[31] .debug_loc PROGBITS 00000000 153190 000a55 00 0 0 1
[32] .symtab SYMTAB 00000000 153be8 0039b0 10 33 545 4
[33] .strtab STRTAB 00000000 157598 0024c7 00 0 0 1
[34] .shstrtab STRTAB 00000000 159a5f 0001ce 00 0 0 1
[11] .ARM.extab PROGBITS 000057b4 0157b4 0002f4 00 A 0 0 4
[12] .ARM.exidx ARM_EXIDX 00005aa8 015aa8 0002b8 00 AL 1 0 4
[ 8] .data_RAM3 PROGBITS 04000000 030080 000000 00 W 0 0 4
[15] .noinit_RAM3 PROGBITS 04000000 030080 000000 00 W 0 0 4
[ 2] .data PROGBITS 20000000 030000 000080 00 WA 0 0 4
[13] .uninit_RESERVED PROGBITS 20000000 030080 000000 00 W 0 0 4
[10] .bss NOBITS 20000080 030080 000120 00 WA 0 0 4
[17] .noinit PROGBITS 200001a0 030080 000000 00 W 0 0 4
[18] .heap NOBITS 200001a0 030080 001000 00 WA 0 0 4
[19] .heap2stackfill NOBITS 200011a0 030080 001000 00 WA 0 0 1
[20] .stack PROGBITS 20021000 030080 000000 00 W 0 0 4
[ 3] .data_RAM2_core_m33slave_text PROGBITS 20022000 022000 00ac8c 00 AX 0 0 4
[ 4] .data_RAM2_core_m33slave_ARM_extab PROGBITS 2002cc8c 02cc8c 0002e8 00 A 0 0 4
[ 5] .data_RAM2_core_m33slave_ARM_exidx ARM_EXIDX 2002cf74 02cf74 0002b8 00 AL 3 0 4
[ 6] .data_RAM2_core_m33slave_data PROGBITS 2002d22c 02d22c 000370 00 WA 0 0 64
[ 7] .data_RAM2 PROGBITS 2002d59c 030080 000000 00 W 0 0 4
[14] .noinit_RAM2 PROGBITS 2002d59c 030080 000000 00 W 0 0 4
[ 9] .data_RAM4 PROGBITS 40100000 030080 000000 00 W 0 0 4
[16] .noinit_RAM4 PROGBITS 40100000 030080 000000 00 W 0 0 4

Re: Multicore slave - Statics not initialised

ZhangJennie — Mon, 01 Apr 2019 04:03:30 GMT

HI Andew,

I was not in office last Thursday and Friday.

If you could, please send your both slave and master project here. I will check it directly.

Have a nice day,

Jun Zhang

Re: Multicore slave - Statics not initialised

AndyCapon — Mon, 01 Apr 2019 05:42:17 GMT

Hi Jun Zhang,

I don't seem to be able to attach a zip file here, maybe I do not have the permissions?

Andy