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    <title>topic Latest Frequency driver implementation in MBDT DIY projects</title>
    <link>https://community.nxp.com/t5/MBDT-DIY-projects/Latest-Frequency-driver-implementation/m-p/929764#M7</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Its really a great architecture and design which is introduced as a part of IMX 8 series,I just went through the &lt;STRONG&gt;CPUREq&lt;/STRONG&gt; driver code in the &lt;STRONG&gt;4.14.98 kernel version&lt;/STRONG&gt;, And observed that an new file name &lt;STRONG&gt;cpufreq_imx8&lt;/STRONG&gt; has been introduced, which consist of&amp;nbsp;a driver implementation&amp;nbsp;for the&amp;nbsp; cpu frequency scaling, previously for the sabra like boards, generic driver has been working for the same. And understood that during the set target function callback for the latest driver, we just write the cpu frequency using &lt;STRONG&gt;smc&lt;/STRONG&gt; call and retrieve the same frequency to the cpu related structure for giving the changes back to the userspace.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And i wonder how come the Voltage regulator thing is managed for this ! :smileyhappy:, Previous generic device driver was setting the regulator voltage during the set callback. Finally i reached to an another point that the new architecture contains an secure firmware which is running in one of the arm core. And which includes the pmic pf8100 driver which mainly do the voltage set and get, And Linux kernel driver interacts with the secure firmware using an inter processor communication mechanism.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So i expected some code in the latest cpu freq driver code, which will communicate with the SCFW firmware and ask to set the voltage. But i did not see that, I might be wrong and the same will handled in another and better way too, But just for a curiosity i would like to ask this, How come the corresponding voltage (read from the opp) is set to the pmic during the frequency change. ? And all device driver from the kernel should be go through the secure channel only ?&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 31 Jul 2019 05:46:21 GMT</pubDate>
    <dc:creator>arunkvnss</dc:creator>
    <dc:date>2019-07-31T05:46:21Z</dc:date>
    <item>
      <title>Latest Frequency driver implementation</title>
      <link>https://community.nxp.com/t5/MBDT-DIY-projects/Latest-Frequency-driver-implementation/m-p/929764#M7</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Its really a great architecture and design which is introduced as a part of IMX 8 series,I just went through the &lt;STRONG&gt;CPUREq&lt;/STRONG&gt; driver code in the &lt;STRONG&gt;4.14.98 kernel version&lt;/STRONG&gt;, And observed that an new file name &lt;STRONG&gt;cpufreq_imx8&lt;/STRONG&gt; has been introduced, which consist of&amp;nbsp;a driver implementation&amp;nbsp;for the&amp;nbsp; cpu frequency scaling, previously for the sabra like boards, generic driver has been working for the same. And understood that during the set target function callback for the latest driver, we just write the cpu frequency using &lt;STRONG&gt;smc&lt;/STRONG&gt; call and retrieve the same frequency to the cpu related structure for giving the changes back to the userspace.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And i wonder how come the Voltage regulator thing is managed for this ! :smileyhappy:, Previous generic device driver was setting the regulator voltage during the set callback. Finally i reached to an another point that the new architecture contains an secure firmware which is running in one of the arm core. And which includes the pmic pf8100 driver which mainly do the voltage set and get, And Linux kernel driver interacts with the secure firmware using an inter processor communication mechanism.&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So i expected some code in the latest cpu freq driver code, which will communicate with the SCFW firmware and ask to set the voltage. But i did not see that, I might be wrong and the same will handled in another and better way too, But just for a curiosity i would like to ask this, How come the corresponding voltage (read from the opp) is set to the pmic during the frequency change. ? And all device driver from the kernel should be go through the secure channel only ?&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Jul 2019 05:46:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MBDT-DIY-projects/Latest-Frequency-driver-implementation/m-p/929764#M7</guid>
      <dc:creator>arunkvnss</dc:creator>
      <dc:date>2019-07-31T05:46:21Z</dc:date>
    </item>
    <item>
      <title>Re: Latest Frequency driver implementation</title>
      <link>https://community.nxp.com/t5/MBDT-DIY-projects/Latest-Frequency-driver-implementation/m-p/929765#M8</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi team,&lt;/P&gt;&lt;P&gt;Please have look on my queries, After spending time with the source code, I got a little insight that the Linux kernel is making a Secure monitor call to the&amp;nbsp;&lt;STRONG&gt;Atmel trusted firmware&lt;/STRONG&gt;, and this guy inform the&amp;nbsp;&lt;STRONG&gt;SCU&lt;/STRONG&gt;&amp;nbsp; using a &lt;STRONG&gt;remote procedure call&lt;/STRONG&gt; (inter processor communication) , And finally the scu firmware (&lt;STRONG&gt;SCFW&lt;/STRONG&gt;) will set the voltage to the &lt;STRONG&gt;PMIC&lt;/STRONG&gt;.So far very fine, And the confusing thing is that from where the&amp;nbsp; SCFW will get the voltage corresponding to the frequency, Previously it was part of the kernel &lt;STRONG&gt;DTB&lt;/STRONG&gt;, How that is managed under SCFW firmware ?. Kindly reply me with information, And During boot up how the board_XXXXXX functions are invoked ? I didnt find any reference in the source code for those functions,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance :smileyhappy:.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 05 Aug 2019 12:33:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MBDT-DIY-projects/Latest-Frequency-driver-implementation/m-p/929765#M8</guid>
      <dc:creator>arunkvnss</dc:creator>
      <dc:date>2019-08-05T12:33:05Z</dc:date>
    </item>
    <item>
      <title>Re: Latest Frequency driver implementation</title>
      <link>https://community.nxp.com/t5/MBDT-DIY-projects/Latest-Frequency-driver-implementation/m-p/929766#M9</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello &lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/arunkvnss@gmail.com"&gt;arunkvnss@gmail.com&lt;/A&gt;‌,&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #51626f; background: white;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #51626f; background: white;"&gt;This community space do not cover the topic you need assistance on.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #51626f; background: white;"&gt;Please create new thread on the &lt;A href="https://community.nxp.com/space/2004"&gt;i.MX Processors&lt;/A&gt;&amp;nbsp; community space or&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.5pt; color: #51626f; background: white;"&gt;new NXP support case according to following procedure:&lt;/SPAN&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-329745"&gt;https://community.nxp.com/docs/DOC-329745&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope this helps,&lt;/P&gt;&lt;P&gt;Marius&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 23 Jan 2020 09:52:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/MBDT-DIY-projects/Latest-Frequency-driver-implementation/m-p/929766#M9</guid>
      <dc:creator>mariuslucianand</dc:creator>
      <dc:date>2020-01-23T09:52:29Z</dc:date>
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