topic Re: Reg: Raising edge and Falling edge detection issue_S32k344 in Model-Based Design Toolbox (MBDT)

Reg: Raising edge and Falling edge detection issue_S32k344

DrKarthi — Sat, 06 Jul 2024 05:30:43 GMT

Hardware used:

1. S32k344-172 EVB

2. Custom hardware S32k344-172

Condition:

We need to ON and off certain function when PWM raising edge and falling edge detected.

Attempt:

1. We also tried using example model for PWM falling edge detection is working fine only on falling edge,

but when we tried to change edgedetection_notification block from falling into raising edge/both edges. it will show same results as falling edge only. ( we also do changes in S32DS configuration and update code)

2. In view code we checked after run model, in program its also not updating some time.

3. is there any method to detect raising edge and falling edge internally with register/function

Kindly let us know how to monitor raising and falling edge.?

Thanks and Regards

Dr. Karthi

@Irina_Costachescu @Robin_Shen @dragostoma @constantinrazva @Vijay98

Re: Reg: Raising edge and Falling edge detection issue_S32k344

Irina_Costachescu — Fri, 12 Jul 2024 13:51:54 GMT

Hello @DrKarthi,

For enabling the execution of a callback associated to a Pwm channel at both edges of the PWM signal, besides setting the Notification on PWM_BOTH_EDGES using the Pwm_EnableNotification, like you do in the Initialization subsystem of your model, one additional setting is needed in the associated .mex configuration file.

Hence, can you please set the Flag Generation parameter on the Both_Trailing_and_Leading_Edge option and check if after this change you can achieve the desired behavior? I have attached below a screenshot of the setting.

I have tested your model with this setting, with a minor modification that inside the PwmChannel_0_Callback I am toggling the RGBLED0_BLUE LED, instead of constantly feeding it the 1 value. After connecting a Logic Analyzer to the pin on which the PWM signal is generated (PTA1) and also on the pin corresponding to the LED (PTA31), I have obtained the following results.

As you can see, at each edge of the PWM signal, the LED is changing its value, meaning that the callback its executed at both rising and falling edge.

Moreover, for making sure that the Simulink generated code gets updated according to the latest modifications inside your model, between consecutive build of your application, you could try erasing the modelName_ert_rtw, slprj folders and also the modelName.slxc file.

Please let us know if this helps or if further information is required from our side.

Thank you,

Irina

Re: Reg: Raising edge and Falling edge detection issue_S32k344

DrKarthi — Thu, 08 Aug 2024 12:40:00 GMT

Hi @Irina_Costachescu

Thanks for response, i erased the file & folder as you mentioned. And generated new file it works!

But we had issue on delay response on ON & off time of 2 PWM pulse, after raising and falling edge detection of 1 PWM Pulse.

Our expectation:

when raising edge of 1 pulse interupt, without delay 2 pulse need to ON, similiary falling edge of 1 pulse need to turn OFF. Please refer expected_condition.png.

Problem:

But we observed, 2 PWM pulse delay in ON & OFF after raising edge & falling edge of 1 PWM Pulse. please refer observed_condition.png

Kinldy help to meet the expected condition.

I attached the File for your reference.

@Vijay98 @dragostoma

Re: Reg: Raising edge and Falling edge detection issue_S32k344

Irina_Costachescu — Thu, 29 Aug 2024 14:15:50 GMT

Hi @DrKarthi

I think that the delay you are noticing is caused by the functions executed between the time the PWM signal is generated and the time when the action inside the PWM Callback function is executed (in your model's case the DIO channel toggle). Please note that the code generated by the MBDT blocks is based on the RTD (Real Time Drivers). The PWM Callback function is called from the implementation of the RTD for the EMIOS Interrupt Service Routine, where several actions are performed, additional to the call to the user callback. The time in which these actions are executed is reflected in the delay between the edges of the two signals (PWM and DIO). Moreover, the Dio_WriteChannel function, contains additional functions as well, called in a specific order, until the point where the actual value of the signal is changed (from 0 to 1 or vice versa).

One way in which you could improve this time, is to change the optimization level for the compiler settings, inside the Code Generation tab of the model's Configuration Parameters. I have tested the same model with the -O0 optimization level (as your model is set), and with -O2 (increased level of code optimization), and in the results obtain I am noticing an improvement of this delay time. Please see the attached images.

The first one corresponds to the initial settings for the compiler optimization (-O0), and the second one corresponds to the -O2 flag, available by selecting the Faster Runs Build Configuration.

Please let us know if this helps,

Irina

Re: Reg: Raising edge and Falling edge detection issue_S32k344

DrKarthi — Sat, 07 Sep 2024 15:48:08 GMT

Hi @Irina_Costachescu

Thanks for your detailed explanation. We tried your suggestion, and it works for both the rising and falling edges.

However, we are encountering an issue with the flag generation for '0' & '1' during edge triggers.

Conditions:

We are controlling the first PWM-1 generation using a software/hardware interrupt. Based on PWM1, the PWM2 callback (PWMchannel_0_callback) functions correctly for both the rising and falling edges (0 & 1).

Challenges:

With each software/hardware interrupt, the flag generation condition seems to vary in response, switching from 0 to 1 and 1 to 0. Due to this, the on and off times of the PWM signal change unexpectedly.

During the first interrupt (Ign_status = 0 to 1), the edge flag is 1 for a short time and 0 for a long time.

During the next interrupt (Ign_status = 0 to 1), the edge flag is 0 for a short time and 1 for a long time.

I’ve attached the model for your reference. Kindly help as soon as possible.

Re: Reg: Raising edge and Falling edge detection issue_S32k344

DrKarthi — Tue, 10 Sep 2024 05:19:58 GMT

Any update on above.

@Irina_Costachescu @dragostoma

Re: Reg: Raising edge and Falling edge detection issue_S32k344

Irina_Costachescu — Thu, 12 Sep 2024 11:11:43 GMT

Hi @DrKarthi

Thank you for sharing your project with us.

We will take a look into the model you have shared, deploy it and test it on hardware on our side and debug it for identifying the cause of the issue you are encountering.

We will reply to this thread as soon as we will reach to a solution that will help you overcome the problem.

Thank you for your understanding,

Irina

Re: Reg: Raising edge and Falling edge detection issue_S32k344

DrKarthi — Tue, 17 Sep 2024 12:23:21 GMT

Hi @Irina_Costachescu

waiting for your reply along with there is another issue, not synchrozing with PWM1 and PWM2. My other colleges also posted in community with PWM images.

https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/Pwm-delay-in-trigger-pulse/m-p/1955433#M9500

mostly this issue we are observing in callback function. For this issue, project shared already with you.

Kindly help to resolve.

Thanks and regards

Dr.Karthi

Re: Reg: Raising edge and Falling edge detection issue_S32k344

stefanvlad — Fri, 04 Oct 2024 15:16:16 GMT

Hi @DrKarthi ,

I have posted a solution for your problem in the following thread:

Re: Pwm_delay_in_trigger_pulse - NXP Community

TLDR: Please try the FastUpdatePWM implementation in your model, or you can test the attached model in s32k312_pwm_lcu_s32ct.zip,

Let me know if this helps you and have a great weekend,

Stefan V.