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    <title>topic FlexIO PWM in Model-Based Design Toolbox (MBDT)</title>
    <link>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1489461#M7490</link>
    <description>&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;I am using Simulink model-based design to generate code so I tried 2 things&lt;BR /&gt;1st I add the FlexIO Uart Config file(&lt;BR /&gt;When I am using the FLexIo Uart Config file I am unable to use my IRQ handler it gives me the error exio_common.c:347: multiple definitions of `FLEXIO_IRQHandler'&lt;BR /&gt;I comment out my IRQ handler the code run without any error but without the handler my code is logicless&lt;BR /&gt;)&lt;BR /&gt;2nd I removed the FlexIO UART Config and run the code I get the error for Missing header file and to copy the header file into my code folder I went to the location but I didn't find the specific header file you can see it in the images I am sharing&lt;/P&gt;&lt;P&gt;Best regads,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Link to same question with images in same community but other section -&amp;nbsp;&lt;A href="https://community.nxp.com/t5/S32K/FlexIO-PWM-MBDT/m-p/1489051#M16348" target="_blank"&gt;Re: FlexIO PWM - NXP Community&lt;/A&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 14 Jul 2022 11:37:35 GMT</pubDate>
    <dc:creator>JustMet</dc:creator>
    <dc:date>2022-07-14T11:37:35Z</dc:date>
    <item>
      <title>FlexIO PWM</title>
      <link>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1489461#M7490</link>
      <description>&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;I am using Simulink model-based design to generate code so I tried 2 things&lt;BR /&gt;1st I add the FlexIO Uart Config file(&lt;BR /&gt;When I am using the FLexIo Uart Config file I am unable to use my IRQ handler it gives me the error exio_common.c:347: multiple definitions of `FLEXIO_IRQHandler'&lt;BR /&gt;I comment out my IRQ handler the code run without any error but without the handler my code is logicless&lt;BR /&gt;)&lt;BR /&gt;2nd I removed the FlexIO UART Config and run the code I get the error for Missing header file and to copy the header file into my code folder I went to the location but I didn't find the specific header file you can see it in the images I am sharing&lt;/P&gt;&lt;P&gt;Best regads,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Link to same question with images in same community but other section -&amp;nbsp;&lt;A href="https://community.nxp.com/t5/S32K/FlexIO-PWM-MBDT/m-p/1489051#M16348" target="_blank"&gt;Re: FlexIO PWM - NXP Community&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Jul 2022 11:37:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1489461#M7490</guid>
      <dc:creator>JustMet</dc:creator>
      <dc:date>2022-07-14T11:37:35Z</dc:date>
    </item>
    <item>
      <title>Re: FlexIO PWM</title>
      <link>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1493870#M7530</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203068"&gt;@JustMet&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;Could you please have a look first at the examples we provide together with our toolbox related to the FlexIO UART, and try one of the examples there on your setup?&lt;/P&gt;
&lt;P&gt;For example you could start with&amp;nbsp;fxio_uart_hello_world_s32k14x example&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="mariuslucianand_0-1658476388480.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/187508i2BE134C9232D6BD9/image-size/medium?v=v2&amp;amp;px=400" role="button" title="mariuslucianand_0-1658476388480.png" alt="mariuslucianand_0-1658476388480.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;If you are still unable to build your example, and still facing errors, could you please send me your example?&lt;/P&gt;
&lt;P&gt;Hope this helps,&lt;/P&gt;
&lt;P&gt;Marius&lt;/P&gt;</description>
      <pubDate>Fri, 22 Jul 2022 07:53:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1493870#M7530</guid>
      <dc:creator>mariuslucianand</dc:creator>
      <dc:date>2022-07-22T07:53:48Z</dc:date>
    </item>
    <item>
      <title>Re: FlexIO PWM</title>
      <link>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1493979#M7532</link>
      <description>&lt;P&gt;hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/72088"&gt;@mariuslucianand&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Yes, I can build examples on my setup I think it's my error on tlc file. I am trying to transmit SENT Signal from PTD0 PTD1 currently and later want to use multiple blocks to transmit SENT signal from all available FLEXIO Tx pins.&lt;/P&gt;</description>
      <pubDate>Fri, 22 Jul 2022 10:00:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1493979#M7532</guid>
      <dc:creator>JustMet</dc:creator>
      <dc:date>2022-07-22T10:00:05Z</dc:date>
    </item>
    <item>
      <title>Re: FlexIO PWM</title>
      <link>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1497339#M7562</link>
      <description>&lt;P&gt;&lt;SPAN&gt;Hello, &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;So I updated my code, TLC and Mex file&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;-&amp;gt; in my code now instead of using&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;FLEXIO_IRQHandler(FlexIo_IRQN)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&lt;SPAN&gt;i am manualy calling&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;FLEXIO_IRQHandler1(uint32_t DATA),&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;this is also updated in TLC file so in tlc -&amp;gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;%function Outputs(block, system) Output&lt;BR /&gt;%if FEVAL("mbd_s32k_is_codegen_compatible", CompiledModel.Name)&lt;BR /&gt;FLEXIO_IRQHandler1(%&amp;lt;LibBlockInputSignal(0, "", "", 0)&amp;gt;); %%DATA&lt;BR /&gt;%%&amp;lt;LibBlockOutputSignal(0, "", "", 0)&amp;gt; = returnData1(%&amp;lt;LibBlockInputSignal(1, "", "", 0)&amp;gt;); %%return Data to Output&lt;BR /&gt;%endif&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;%endfunction&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;also i am attaching the simulink model ,snapshot of tlc and s function c file with this post&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;in the model i am taking converted data from adc block and using that data for Transmiting SENT Singnal&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;The code is working in IAR Debugger (there i have ADC function ) in simulink i am using ADC block for adc conversion&lt;BR /&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;i am initialising the clock and FLEXIO and i am getting this error and i cant seem to understand what i am missing&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;if i include&amp;nbsp;&lt;SPAN&gt; #include "S32K144.h" file i get the error no such file or directory so i also added this file into my code folder but same error and once i remove the include i get the following error&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&lt;SPAN&gt;driver.c:61:20: error: 'SCG_SOSCCSR_SOSCEN_MASK' undeclared (first use in this function) SCG-&amp;gt;SOSCCSR &amp;amp;= ~SCG_SOSCCSR_SOSCEN_MASK; /* SOSCEN=0: System OSC is disabled */ ^~~~~~~~~~~~~~~~~~~~~~~ driver.c:64:19: warning: implicit declaration of function 'SCG_SOSCCFG_RANGE' [-Wimplicit-function-declaration] SCG-&amp;gt;SOSCCFG = SCG_SOSCCFG_RANGE(3) | /* RANGE=3: High frequency range selected for the crystal oscillator of 8 MHz to 40 MHz */ ^~~~~~~~~~~~~~~~~ driver.c:65:19: error: 'SCG_SOSCCFG_HGO_MASK' undeclared (first use in this function) SCG_SOSCCFG_HGO_MASK | /* HGO=1: Configure crystal oscillator for high-gain operation */ ^~~~~~~~~~~~~~~~~~~~ driver.c:66:19: error: 'SCG_SOSCCFG_EREFS_MASK' undeclared (first use in this function) SCG_SOSCCFG_EREFS_MASK; /* EREFS=1: Internal oscillator of OSC requested */ ^~~~~~~~~~~~~~~~~~~~~~ driver.c:67:19: error: 'SCG_SOSCCSR_SOSCCM_MASK' undeclared (first use in this function) SCG-&amp;gt;SOSCCSR = SCG_SOSCCSR_SOSCCM_MASK | /* SOSCCM=1: System OSC Clock Monitor is enabled */ ^~~~~~~~~~~~~~~~~~~~~~~ driver.c:71:25: error: 'SCG_SOSCCSR_SOSCVLD_MASK' undeclared (first use in this function) while((SCG-&amp;gt;SOSCCSR &amp;amp; SCG_SOSCCSR_SOSCVLD_MASK) == 0){} ^~~~~~~~~~~~~~~~~~~~~~~~ driver.c: In function 'SystemPLL_setup': driver.c:77:3: error: 'SCG' undeclared (first use in this function) SCG-&amp;gt;SPLLCSR &amp;amp;= ~SCG_SPLLCSR_SPLLEN_MASK; /* SPLLEN=0: System PLL is disabled */ ^~~ driver.c:77:20: error: 'SCG_SPLLCSR_SPLLEN_MASK' undeclared (first use in this function) SCG-&amp;gt;SPLLCSR &amp;amp;= ~SCG_SPLLCSR_SPLLEN_MASK; /* SPLLEN=0: System PLL is disabled */ ^~~~~~~~~~~~~~~~~~~~~~~ driver.c:78:19: error: 'SCG_SPLLCSR_SPLLCM_MASK' undeclared (first use in this function) SCG-&amp;gt;SPLLCSR |= SCG_SPLLCSR_SPLLCM_MASK; /* SPLLCM=1: System PLL Clock Monitor is enabled */ ^~~~~~~~~~~~~~~~~~~~~~~ driver.c:80:18: warning: implicit declaration of function 'SCG_SPLLCFG_PREDIV' [-Wimplicit-function-declaration] SCG-&amp;gt;SPLLCFG = SCG_SPLLCFG_PREDIV(0) | /* PREDIV=0: Divided by 1, thus PLL Reference input is 8MHz */ ^~~~~~~~~~~~~~~~~~ driver.c:81:18: warning: implicit declaration of function 'SCG_SPLLCFG_MULT' [-Wimplicit-function-declaration] SCG_SPLLCFG_MULT(0x18); /* VCO_CLK should be 180MHz ~ 320MHz */ ^~~~~~~~~~~~~~~~ driver.c:86:25: error: 'SCG_SPLLCSR_SPLLVLD_MASK' undeclared (first use in this function) while((SCG-&amp;gt;SPLLCSR &amp;amp; SCG_SPLLCSR_SPLLVLD_MASK) == 0); ^~~~~~~~~~~~~~~~~~~~~~~~ driver.c: In function 'SCG_clock_dividers_setup': driver.c:91:3: error: 'SCG' undeclared (first use in this function) SCG-&amp;gt;RCCR = SCG_RCCR_SCS(2) | /* SCS=2: System Clock Source is SIRC */ ^~~ driver.c:91:15: warning: implicit declaration of function 'SCG_RCCR_SCS' [-Wimplicit-function-declaration] SCG-&amp;gt;RCCR = SCG_RCCR_SCS(2) | /* SCS=2: System Clock Source is SIRC */ ^~~~~~~~~~~~ driver.c:92:15: warning: implicit declaration of function 'SCG_RCCR_DIVCORE' [-Wimplicit-function-declaration] SCG_RCCR_DIVCORE(1) | /* DIVCORE=1: Divided by 2, thus CORE/SYS_CLK frequency is 8 / 1 = 8MHz */ ^~~~~~~~~~~~~~~~ driver.c:93:15: warning: implicit declaration of function 'SCG_RCCR_DIVBUS' [-Wimplicit-function-declaration] SCG_RCCR_DIVBUS(1) | /* DIVBUS=1: Divided by 2, thus BUS_CLK frequency is 8 / 2 = 4MHz */ ^~~~~~~~~~~~~~~ driver.c:94:15: warning: implicit declaration of function 'SCG_RCCR_DIVSLOW' [-Wimplicit-function-declaration] SCG_RCCR_DIVSLOW(2); /* DIVSLOW=2: Divided by 3, thus FLASH_CLK is 8 / 3 = 2.67MHz */ ^~~~~~~~~~~~~~~~ driver.c: In function 'Platform_setup': driver.c:104:3: error: 'LMEM' undeclared (first use in this function) LMEM-&amp;gt;PCCCR = LMEM_PCCCR_GO_MASK | /* Initiate Cache Command */ ^~~~ driver.c:104:17: error: 'LMEM_PCCCR_GO_MASK' undeclared (first use in this function) LMEM-&amp;gt;PCCCR = LMEM_PCCCR_GO_MASK | /* Initiate Cache Command */ ^~~~~~~~~~~~~~~~~~ driver.c:105:17: error: 'LMEM_PCCCR_INVW1_MASK' undeclared (first use in this function) LMEM_PCCCR_INVW1_MASK | /* Invalidate all lines in way 1 */ ^~~~~~~~~~~~~~~~~~~~~ driver.c:106:17: error: 'LMEM_PCCCR_INVW0_MASK' undeclared (first use in this function) LMEM_PCCCR_INVW0_MASK | /* Invalidate all lines in way 0 */ ^~~~~~~~~~~~~~~~~~~~~ driver.c:108:17: error: 'LMEM_PCCCR_ENCACHE_MASK' undeclared (first use in this function) LMEM_PCCCR_ENCACHE_MASK; /* Cache enabled */ ^~~~~~~~~~~~~~~~~~~~~~~ driver.c: In function 'Flexio_PWM_setup': driver.c:113:3: error: 'SCG' undeclared (first use in this function) SCG-&amp;gt;SOSCDIV |= SCG_SOSCDIV_SOSCDIV2(4); /* SOSCDIV2=4: Divided by 8, thus 8 / 8 = 1MHz */ ^~~ driver.c:113:19: warning: implicit declaration of function 'SCG_SOSCDIV_SOSCDIV2' [-Wimplicit-function-declaration] SCG-&amp;gt;SOSCDIV |= SCG_SOSCDIV_SOSCDIV2(4); /* SOSCDIV2=4: Divided by 8, thus 8 / 8 = 1MHz */ ^~~~~~~~~~~~~~~~~~~~ driver.c:114:3: error: 'PCC' undeclared (first use in this function) PCC-&amp;gt;PCCn[PCC_FLEXIO_INDEX] &amp;amp;= ~PCC_PCCn_CGC_MASK; /* Disable clock to change PCS */ ^~~ driver.c:114:13: error: 'PCC_FLEXIO_INDEX' undeclared (first use in this function) PCC-&amp;gt;PCCn[PCC_FLEXIO_INDEX] &amp;amp;= ~PCC_PCCn_CGC_MASK; /* Disable clock to change PCS */ ^~~~~~~~~~~~~~~~ driver.c:114:35: error: 'PCC_PCCn_CGC_MASK' undeclared (first use in this function) PCC-&amp;gt;PCCn[PCC_FLEXIO_INDEX] &amp;amp;= ~PCC_PCCn_CGC_MASK; /* Disable clock to change PCS */ ^~~~~~~~~~~~~~~~~ driver.c:115:35: error: 'PCC_PCCn_PCS_MASK' undeclared (first use in this function) PCC-&amp;gt;PCCn[PCC_FLEXIO_INDEX] &amp;amp;= ~PCC_PCCn_PCS_MASK; /* Temporarily clear PCS */ ^~~~~~~~~~~~~~~~~ driver.c:116:34: warning: implicit declaration of function 'PCC_PCCn_PCS' [-Wimplicit-function-declaration] PCC-&amp;gt;PCCn[PCC_FLEXIO_INDEX] |= PCC_PCCn_PCS(1); /* PCS=1: Select SOSCDIV2_CLK */ ^~~~~~~~~~~~ driver.c:120:3: error: 'FLEXIO' undeclared (first use in this function) FLEXIO-&amp;gt;SHIFTCTL[0] = FLEXIO_SHIFTCTL_SMOD(2) | /* 2: Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer */ ^~~~~~ driver.c:120:25: warning: implicit declaration of function 'FLEXIO_SHIFTCTL_SMOD' [-Wimplicit-function-declaration] FLEXIO-&amp;gt;SHIFTCTL[0] = FLEXIO_SHIFTCTL_SMOD(2) | /* 2: Transmit mode. Load SHIFTBUF contents into the Shifter on expiration of the Timer */ ^~~~~~~~~~~~~~~~~~~~ driver.c:121:25: warning: implicit declaration of function 'FLEXIO_SHIFTCTL_PINPOL' [-Wimplicit-function-declaration] FLEXIO_SHIFTCTL_PINPOL(0) | /* 0: Pin is active high */ ^~~~~~~~~~~~~~~~~~~~~~ driver.c:122:25: warning: implicit declaration of function 'FLEXIO_SHIFTCTL_PINSEL' [-Wimplicit-function-declaration] FLEXIO_SHIFTCTL_PINSEL(0) | /* 1: Select the FXIO_D0 pin */ ^~~~~~~~~~~~~~~~~~~~~~ driver.c:123:25: warning: implicit declaration of function 'FLEXIO_SHIFTCTL_PINCFG' [-Wimplicit-function-declaration] FLEXIO_SHIFTCTL_PINCFG(0) | /* 0: Shifter pin output disabled */ ^~~~~~~~~~~~~~~~~~~~~~ driver.c:124:25: warning: implicit declaration of function 'FLEXIO_SHIFTCTL_TIMPOL' [-Wimplicit-function-declaration] FLEXIO_SHIFTCTL_TIMPOL(1) | /* 1: Shift on negedge of Shift clock */ ^~~~~~~~~~~~~~~~~~~~~~ driver.c:125:25: warning: implicit declaration of function 'FLEXIO_SHIFTCTL_TIMSEL' [-Wimplicit-function-declaration] FLEXIO_SHIFTCTL_TIMSEL(0); /* 0: Select Timer 0 */ ^~~~~~~~~~~~~~~~~~~~~~ driver.c:127:25: warning: implicit declaration of function 'FLEXIO_SHIFTCFG_SSTART' [-Wimplicit-function-declaration] FLEXIO-&amp;gt;SHIFTCFG[0] = FLEXIO_SHIFTCFG_SSTART(0) | /* 0: Start bit disabled for transmitter/receiver/match store, transmitter loads data on enable */ ^~~~~~~~~~~~~~~~~~~~~~ driver.c:128:25: warning: implicit declaration of function 'FLEXIO_SHIFTCFG_SSTOP' [-Wimplicit-function-declaration] FLEXIO_SHIFTCFG_SSTOP(0) | /* 0: Stop bit disabled for transmitter/receiver/match store */ ^~~~~~~~~~~~~~~~~~~~~ driver.c:129:25: warning: implicit declaration of function 'FLEXIO_SHIFTCFG_INSRC' [-Wimplicit-function-declaration] FLEXIO_SHIFTCFG_INSRC(0); /* 0: Pin */ ^~~~~~~~~~~~~~~~~~~~~ driver.c:133:23: warning: implicit declaration of function 'FLEXIO_TIMCFG_TSTART' [-Wimplicit-function-declaration] FLEXIO-&amp;gt;TIMCFG[0] = FLEXIO_TIMCFG_TSTART(0) | /* 0: Start bit disabled */ ^~~~~~~~~~~~~~~~~~~~ driver.c:134:23: warning: implicit declaration of function 'FLEXIO_TIMCFG_TSTOP' [-Wimplicit-function-declaration] FLEXIO_TIMCFG_TSTOP(0) | /* 0: Stop bit disabled */ ^~~~~~~~~~~~~~~~~~~ driver.c:135:23: warning: implicit declaration of function 'FLEXIO_TIMCFG_TIMENA' [-Wimplicit-function-declaration] FLEXIO_TIMCFG_TIMENA(2) | /* 2: Timer enabled on Trigger high */ ^~~~~~~~~~~~~~~~~~~~ driver.c:136:23: warning: implicit declaration of function 'FLEXIO_TIMCFG_TIMDIS' [-Wimplicit-function-declaration] FLEXIO_TIMCFG_TIMDIS(0) | /* 0: Timer never disabled */ ^~~~~~~~~~~~~~~~~~~~ driver.c:137:23: warning: implicit declaration of function 'FLEXIO_TIMCFG_TIMRST' [-Wimplicit-function-declaration] FLEXIO_TIMCFG_TIMRST(0) | /* 0: Timer never reset */ ^~~~~~~~~~~~~~~~~~~~ driver.c:138:23: warning: implicit declaration of function 'FLEXIO_TIMCFG_TIMDEC' [-Wimplicit-function-declaration] FLEXIO_TIMCFG_TIMDEC(0) | /* 0: Decrement counter on FlexIO clock, Shift clock equals Timer output */ ^~~~~~~~~~~~~~~~~~~~ driver.c:139:23: warning: implicit declaration of function 'FLEXIO_TIMCFG_TIMOUT' [-Wimplicit-function-declaration] FLEXIO_TIMCFG_TIMOUT(2); /* 2: Timer output is logic one when enabled and on timer reset */ ^~~~~~~~~~~~~~~~~~~~ driver.c:141:23: warning: implicit declaration of function 'FLEXIO_TIMCTL_TIMOD' [-Wimplicit-function-declaration] FLEXIO-&amp;gt;TIMCTL[0] = FLEXIO_TIMCTL_TIMOD(2) | /* 2: Dual 8-bit counters PWM mode */ ^~~~~~~~~~~~~~~~~~~ driver.c:142:23: warning: implicit declaration of function 'FLEXIO_TIMCTL_PINPOL' [-Wimplicit-function-declaration] FLEXIO_TIMCTL_PINPOL(0) | /* 0: Pin is active high */ ^~~~~~~~~~~~~~~~~~~~ driver.c:143:23: warning: implicit declaration of function 'FLEXIO_TIMCTL_PINSEL' [-Wimplicit-function-declaration] FLEXIO_TIMCTL_PINSEL(1) | /* 1: Select the FXIO_D1 pin */ ^~~~~~~~~~~~~~~~~~~~ driver.c:144:23: warning: implicit declaration of function 'FLEXIO_TIMCTL_PINCFG' [-Wimplicit-function-declaration] FLEXIO_TIMCTL_PINCFG(3) | /* 3: Timer pin output */ ^~~~~~~~~~~~~~~~~~~~ driver.c:145:23: warning: implicit declaration of function 'FLEXIO_TIMCTL_TRGSRC' [-Wimplicit-function-declaration] FLEXIO_TIMCTL_TRGSRC(1) | /* 1: Internal trigger selected */ ^~~~~~~~~~~~~~~~~~~~ driver.c:146:23: warning: implicit declaration of function 'FLEXIO_TIMCTL_TRGPOL' [-Wimplicit-function-declaration] FLEXIO_TIMCTL_TRGPOL(1) | /* 1: Trigger active low */ ^~~~~~~~~~~~~~~~~~~~ driver.c:147:23: warning: implicit declaration of function 'FLEXIO_TIMCTL_TRGSEL' [-Wimplicit-function-declaration] FLEXIO_TIMCTL_TRGSEL(1); /* 1: 4*N+1 - Shifter N(0) status flag */ ^~~~~~~~~~~~~~~~~~~~ driver.c:155:21: warning: implicit declaration of function 'FLEXIO_TIMIEN_TEIE' [-Wimplicit-function-declaration] FLEXIO-&amp;gt;TIMIEN |= FLEXIO_TIMIEN_TEIE(1); /* Timer Status Flag interrupt is enabled */ ^~~~~~~~~~~~~~~~~~ driver.c:156:19: error: 'FLEXIO_CTRL_FLEXEN_MASK' undeclared (first use in this function) FLEXIO-&amp;gt;CTRL |= FLEXIO_CTRL_FLEXEN_MASK; /* Enable FlexIO */ ^~~~~~~~~~~~~~~~~~~~~~~ driver.c:160:13: error: 'PCC_PORTD_INDEX' undeclared (first use in this function) PCC-&amp;gt;PCCn[PCC_PORTD_INDEX] |= PCC_PCCn_CGC_MASK; /* CGC=1: Clock enabled for PORTD */ ^~~~~~~~~~~~~~~ driver.c:161:3: error: 'PORTD' undeclared (first use in this function) PORTD-&amp;gt;PCR[1] &amp;amp;= ~PORT_PCR_MUX_MASK; /* Set MUX=0 temporarily */ ^~~~~ driver.c:161:21: error: 'PORT_PCR_MUX_MASK' undeclared (first use in this function) PORTD-&amp;gt;PCR[1] &amp;amp;= ~PORT_PCR_MUX_MASK; /* Set MUX=0 temporarily */ ^~~~~~~~~~~~~~~~~ driver.c:162:20: warning: implicit declaration of function 'PORT_PCR_MUX' [-Wimplicit-function-declaration] PORTD-&amp;gt;PCR[1] |= PORT_PCR_MUX(6); /* MUX=4: Select FXIO_D1 on PTD1 */ ^~~~~~~~~~~~ driver.c: In function 'FLEXIO_IRQHandler1': driver.c:171:7: error: 'FLEXIO' undeclared (first use in this function) if( FLEXIO-&amp;gt;TIMSTAT &amp;amp; FLEXIO_TIMSTAT_TSF_MASK ) ^~~~~~ driver.c:171:25: error: 'FLEXIO_TIMSTAT_TSF_MASK' undeclared (first use in this function) if( FLEXIO-&amp;gt;TIMSTAT &amp;amp; FLEXIO_TIMSTAT_TSF_MASK ) ^~~~~~~~~~~~~~~~~~~~~~~ driver.c:173:24: warning: implicit declaration of function 'FLEXIO_TIMSTAT_TSF' [-Wimplicit-function-declaration] FLEXIO-&amp;gt;TIMSTAT |= FLEXIO_TIMSTAT_TSF(0x1); /* Write 1 to clear TSF flag */ ^~~~~~~~~~~~~~~~~~&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="MEX.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/188273i9D7301BF9A4C1358/image-size/medium?v=v2&amp;amp;px=400" role="button" title="MEX.png" alt="MEX.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="SENT tx.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/188274i3D81472B6335F10E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="SENT tx.png" alt="SENT tx.png" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="TLC.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/188272i5CD10892ACC2B652/image-size/medium?v=v2&amp;amp;px=400" role="button" title="TLC.png" alt="TLC.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 28 Jul 2022 12:50:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/FlexIO-PWM/m-p/1497339#M7562</guid>
      <dc:creator>JustMet</dc:creator>
      <dc:date>2022-07-28T12:50:42Z</dc:date>
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