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    <title>topic S32K146 SPI1 drives two chips with different configurations in Model-Based Design Toolbox (MBDT)</title>
    <link>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/S32K146-SPI1-drives-two-chips-with-different-configurations/m-p/2153217#M10396</link>
    <description>&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;Using Model-Based Design Toolbox for S32K1xx Series 4.3.0 (R2016a-R2022a) 13-Sep-2022&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;I want to use SPI1 on the S32K146 chip to drive two chips with different configurations.Error when compiling the program，&lt;SPAN&gt;How should I solve it&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Pin check failed on block ‘CDCU Standard 200/SPI Config 1'. Pin is shared with other module:CDCU Standard 200/SPI Config_2&lt;BR /&gt;组件: NXP MBD Toolbox|类别: Block error 错误&lt;BR /&gt;Error duplicating of the LPSPIl configuration blockCDCU Standard 200/SPI Config 1'. The block should be only one.&lt;BR /&gt;组件:NXP MBD Toolbox|类别: Block error 错误&lt;BR /&gt;Error duplicating of the LPSPIl configuration blockCDCU Standard 200/SRI Config 2'. The block should be only one.&lt;/P&gt;&lt;P&gt;The hardware is connected to the chip select pins PSC0 and PSC1.&lt;/P&gt;&lt;P&gt;1. Chip 1 has the following configuration: CPHA 0, CPOL 0, Frame size 32&lt;BR /&gt;2. Chip 2 has the following configuration: CPHA 1, CPOL 0, Frame size 16&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 18 Aug 2025 03:41:06 GMT</pubDate>
    <dc:creator>pengzhao</dc:creator>
    <dc:date>2025-08-18T03:41:06Z</dc:date>
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      <title>S32K146 SPI1 drives two chips with different configurations</title>
      <link>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/S32K146-SPI1-drives-two-chips-with-different-configurations/m-p/2153217#M10396</link>
      <description>&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;Using Model-Based Design Toolbox for S32K1xx Series 4.3.0 (R2016a-R2022a) 13-Sep-2022&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;I want to use SPI1 on the S32K146 chip to drive two chips with different configurations.Error when compiling the program，&lt;SPAN&gt;How should I solve it&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Pin check failed on block ‘CDCU Standard 200/SPI Config 1'. Pin is shared with other module:CDCU Standard 200/SPI Config_2&lt;BR /&gt;组件: NXP MBD Toolbox|类别: Block error 错误&lt;BR /&gt;Error duplicating of the LPSPIl configuration blockCDCU Standard 200/SPI Config 1'. The block should be only one.&lt;BR /&gt;组件:NXP MBD Toolbox|类别: Block error 错误&lt;BR /&gt;Error duplicating of the LPSPIl configuration blockCDCU Standard 200/SRI Config 2'. The block should be only one.&lt;/P&gt;&lt;P&gt;The hardware is connected to the chip select pins PSC0 and PSC1.&lt;/P&gt;&lt;P&gt;1. Chip 1 has the following configuration: CPHA 0, CPOL 0, Frame size 32&lt;BR /&gt;2. Chip 2 has the following configuration: CPHA 1, CPOL 0, Frame size 16&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 18 Aug 2025 03:41:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/S32K146-SPI1-drives-two-chips-with-different-configurations/m-p/2153217#M10396</guid>
      <dc:creator>pengzhao</dc:creator>
      <dc:date>2025-08-18T03:41:06Z</dc:date>
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