https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/Request-for-Validation-Peripheral-Clock-Setup-via-s32k-clock/m-p/2099160#M10253 <P>Hi,</P><P>We are supporting a customer working with the S32K116 and the NXP MBDToolbox v4.3.0 for MATLAB/Simulink.</P><P>The customer experienced issues when switching from external to internal clocks, particularly with peripheral modules like ADC, LPIT, and FTM not being initialized correctly unless manually configured. To provide a more robust and maintainable approach, we proposed centralizing all peripheral clock settings using the clock_manager_user_config_t structure inside a custom s32k_clock_init.c file.</P><P>We have attached both the original file provided by the customer and a cleaned-up version we prepared, based on the recommended ClockManager structure and peripheral configuration approach.</P><P>We would appreciate your feedback on the following points:</P><P>1. Does this centralized configuration approach align with best practices for projects using the MBDToolbox?<BR />2. Could there be any conflicts or unintended behavior when peripheral blocks in the Simulink model also generate their own initialization code?<BR />3. Are there any known issues or constraints when using manual ClockManager-based configuration in parallel with Simulink-generated code?</P><P>If this falls outside the scope of your team, we would appreciate it if you could help redirect this to the appropriate contact within NXP.</P><P>Thank you in advance for your time and support.</P><P>Best regards</P> Fri, 16 May 2025 19:10:56 GMT VictorPastrana 2025-05-16T19:10:56Z https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/Request-for-Validation-Peripheral-Clock-Setup-via-s32k-clock/m-p/2099160#M10253 <P>Hi,</P><P>We are supporting a customer working with the S32K116 and the NXP MBDToolbox v4.3.0 for MATLAB/Simulink.</P><P>The customer experienced issues when switching from external to internal clocks, particularly with peripheral modules like ADC, LPIT, and FTM not being initialized correctly unless manually configured. To provide a more robust and maintainable approach, we proposed centralizing all peripheral clock settings using the clock_manager_user_config_t structure inside a custom s32k_clock_init.c file.</P><P>We have attached both the original file provided by the customer and a cleaned-up version we prepared, based on the recommended ClockManager structure and peripheral configuration approach.</P><P>We would appreciate your feedback on the following points:</P><P>1. Does this centralized configuration approach align with best practices for projects using the MBDToolbox?<BR />2. Could there be any conflicts or unintended behavior when peripheral blocks in the Simulink model also generate their own initialization code?<BR />3. Are there any known issues or constraints when using manual ClockManager-based configuration in parallel with Simulink-generated code?</P><P>If this falls outside the scope of your team, we would appreciate it if you could help redirect this to the appropriate contact within NXP.</P><P>Thank you in advance for your time and support.</P><P>Best regards</P> Fri, 16 May 2025 19:10:56 GMT https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/Request-for-Validation-Peripheral-Clock-Setup-via-s32k-clock/m-p/2099160#M10253 VictorPastrana 2025-05-16T19:10:56Z https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/Request-for-Validation-Peripheral-Clock-Setup-via-s32k-clock/m-p/2105447#M10263 Any help? Tue, 27 May 2025 17:12:04 GMT https://community.nxp.com/t5/Model-Based-Design-Toolbox-MBDT/Request-for-Validation-Peripheral-Clock-Setup-via-s32k-clock/m-p/2105447#M10263 VictorPastrana 2025-05-27T17:12:04Z