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  <channel>
    <title>topic LPC1768 + AT24C08 - Timeout problem in LPCXpresso IDE</title>
    <link>https://community.nxp.com/t5/LPCXpresso-IDE/LPC1768-AT24C08-Timeout-problem/m-p/541248#M7334</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mtgtech on Fri Jul 20 11:00:47 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello, I am using a AT24C08 for store some datas and I'm having trouble. I am using code sample for I2C. The data is being written and read perfectly, but the function I2CStart() return always "timeout". This "problem" causes a delay in my routines of W/R. I believe it is necessary some modification in I2C0_IRQHandler() function. Someone could review my code?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I implemented a matricial keypad for tests of write and read.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;main.c&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
int main (void)
{
char temp[16];
unsigned char c = 0;
unsigned int i = 0;

SystemInit();
SysTick_Config(SystemFrequency/100);&amp;nbsp; /* Generate interrupt each 10 ms&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */

if ( I2CInit( (uint32_t)I2CMASTER ) == FALSE )/* initialize I2c */
{
while ( 1 );/* Fatal error */
}

/* Initialize RTC with RTCCAL and RTCDIR values */
InitRTC();
/* start RTC */
StartRTC();

init_KEYPAD();
lcd_clear();

while(1)
{
c = get_KEYPAD();
if(c == '1')
{
for ( i = 0; i &amp;lt; BUFSIZE; i++ )/* clear buffer */
{
I2CMasterBuffer&lt;I&gt; = 0;
}

I2CWriteLength = 5;
I2CReadLength = 0;
I2CMasterBuffer[0] = AT24C08_ADDR;
I2CMasterBuffer[1] = 0x00;/* address offset for user seq. */

I2CMasterBuffer[2] = LPC_RTC-&amp;gt;HOUR;
I2CMasterBuffer[3] = LPC_RTC-&amp;gt;MIN;
I2CMasterBuffer[4] = LPC_RTC-&amp;gt;SEC;
I2CEngine();
}
if(c == '2')
{
for ( i = 0; i &amp;lt; BUFSIZE; i++ )
{
I2CSlaveBuffer&lt;I&gt; = 0x00;
}
/* Write SLA(W), address, SLA(R), and read one byte back. */
I2CWriteLength = 2;
I2CReadLength = 20;
I2CMasterBuffer[0] = AT24C08_ADDR;
I2CMasterBuffer[1] = 0x00;/* address */
I2CMasterBuffer[2] = AT24C08_ADDR | RD_BIT;
I2CEngine();

}
lcd_gotoxy(0,0);
sprintf(temp,"%d:%d:%d",I2CSlaveBuffer[0],I2CSlaveBuffer[1],I2CSlaveBuffer[2]);
lcd_print(temp);
}

return 0;
&lt;/I&gt;&lt;/I&gt;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;i2c.c&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#include "lpc17xx.h"
#include "type.h"
#include "i2c.h"
#include "lcd.h"

volatile uint32_t I2CMasterState = I2C_IDLE;
volatile uint32_t I2CSlaveState = I2C_IDLE;

volatile uint32_t I2CCmd;
volatile uint32_t I2CMode;

volatile uint8_t I2CMasterBuffer[BUFSIZE];
volatile uint8_t I2CSlaveBuffer[BUFSIZE];
volatile uint32_t I2CCount = 0;
volatile uint32_t I2CReadLength;
volatile uint32_t I2CWriteLength;

volatile uint32_t RdIndex = 0;
volatile uint32_t WrIndex = 0;


void I2C0_IRQHandler(void)&amp;nbsp; 
{
&amp;nbsp; uint8_t StatValue;

&amp;nbsp; /* this handler deals with master read and master write only */
&amp;nbsp; StatValue = LPC_I2C0-&amp;gt;I2STAT;

switch ( StatValue )
&amp;nbsp; {
case 0x08:/* A Start condition is issued. */
WrIndex = 0;
LPC_I2C0-&amp;gt;I2DAT = I2CMasterBuffer[WrIndex++];
LPC_I2C0-&amp;gt;I2CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
break;

case 0x10:/* A repeated started is issued */
RdIndex = 0;
/* Send SLA with R bit set, */
LPC_I2C0-&amp;gt;I2DAT = I2CMasterBuffer[WrIndex++];
LPC_I2C0-&amp;gt;I2CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
break;

case 0x18:/* Regardless, it's a ACK */
if ( I2CWriteLength == 1 )
{
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set Stop flag */
&amp;nbsp; I2CMasterState = I2C_NO_DATA;
}
else
{
&amp;nbsp; LPC_I2C0-&amp;gt;I2DAT = I2CMasterBuffer[WrIndex++];
}
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x28:/* Data byte has been transmitted, regardless ACK or NACK */
if ( WrIndex &amp;lt; I2CWriteLength )
{&amp;nbsp;&amp;nbsp; 
&amp;nbsp; LPC_I2C0-&amp;gt;I2DAT = I2CMasterBuffer[WrIndex++]; /* this should be the last one */
}
else
{
&amp;nbsp; if ( I2CReadLength != 0 )
&amp;nbsp; {
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STA;/* Set Repeated-start flag */
&amp;nbsp; }
&amp;nbsp; else
&amp;nbsp; {
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set Stop flag */
I2CMasterState = I2C_OK;
&amp;nbsp; }
}
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x30:
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set Stop flag */
I2CMasterState = I2C_NACK_ON_DATA;
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x40:/* Master Receive, SLA_R has been sent */
if ( (RdIndex + 1) &amp;lt; I2CReadLength )
{
&amp;nbsp; /* Will go to State 0x50 */
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_AA;/* assert ACK after data is received */
}
else
{
&amp;nbsp; /* Will go to State 0x58 */
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_AAC;/* assert NACK after data is received */
}
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x50:/* Data byte has been received, regardless following ACK or NACK */
I2CSlaveBuffer[RdIndex++] = LPC_I2C0-&amp;gt;I2DAT;
if ( (RdIndex + 1) &amp;lt; I2CReadLength )
{&amp;nbsp;&amp;nbsp; 
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_AA;/* assert ACK after data is received */
}
else
{
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_AAC;/* assert NACK on last byte */
}
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x58:
I2CSlaveBuffer[RdIndex++] = LPC_I2C0-&amp;gt;I2DAT;
I2CMasterState = I2C_OK;
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;/* Set Stop flag */ 
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;/* Clear SI flag */
break;

case 0x20:/* regardless, it's a NACK */
case 0x48:
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set Stop flag */
I2CMasterState = I2C_NACK_ON_ADDRESS;
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x38:/* Arbitration lost, in this example, we don't
deal with multiple master situation */
default:
I2CMasterState = I2C_ARBITRATION_LOST;
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;
&amp;nbsp; }
}

uint32_t I2CStart( void )
{
&amp;nbsp; uint32_t timeout = 0;
&amp;nbsp; uint32_t retVal = FALSE;
 
&amp;nbsp; /*--- Issue a start condition ---*/
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STA;/* Set Start flag */


&amp;nbsp;&amp;nbsp;&amp;nbsp; 
&amp;nbsp; /*--- Wait until START transmitted ---*/
&amp;nbsp; while( 1 )
&amp;nbsp; {
if ( I2CMasterState == I2C_STARTED )
{
&amp;nbsp; retVal = TRUE;
&amp;nbsp; break;
}
if ( timeout &amp;gt;= MAX_TIMEOUT )
{
&amp;nbsp; lcd_gotoxy(1,0);
lcd_print("MAX_TIMEOUT");
&amp;nbsp; retVal = FALSE;
&amp;nbsp; break;
}
timeout++;
&amp;nbsp; }
&amp;nbsp; return( retVal );
}


uint32_t I2CStop( void )
{
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp; /* Set Stop flag */ 
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;&amp;nbsp; /* Clear SI flag */ 
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 
&amp;nbsp; /*--- Wait for STOP detected ---*/
&amp;nbsp; while( LPC_I2C0-&amp;gt;I2CONSET &amp;amp; I2CONSET_STO );
&amp;nbsp; return TRUE;
}


uint32_t I2CInit( uint32_t I2cMode ) 
{
&amp;nbsp; LPC_SC-&amp;gt;PCONP |= (1 &amp;lt;&amp;lt; 7);

&amp;nbsp; /* set PIO0.27 and PIO0.28 to I2C0 SDA and SCL */
&amp;nbsp; /* function to 01 on both SDA and SCL. */
&amp;nbsp; LPC_PINCON-&amp;gt;PINSEL1 &amp;amp;= ~((0x03&amp;lt;&amp;lt;22)|(0x03&amp;lt;&amp;lt;24));
&amp;nbsp; LPC_PINCON-&amp;gt;PINSEL1 |= ((0x01&amp;lt;&amp;lt;22)|(0x01&amp;lt;&amp;lt;24));
 
&amp;nbsp; /*--- Clear flags ---*/
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_AAC | I2CONCLR_SIC | I2CONCLR_STAC | I2CONCLR_I2ENC;&amp;nbsp;&amp;nbsp;&amp;nbsp; 

&amp;nbsp; LPC_PINCON-&amp;gt;I2CPADCFG &amp;amp;= ~((0x1&amp;lt;&amp;lt;0)|(0x1&amp;lt;&amp;lt;2));
&amp;nbsp; LPC_I2C0-&amp;gt;I2SCLL&amp;nbsp;&amp;nbsp; = I2SCLL_SCLL;
&amp;nbsp; LPC_I2C0-&amp;gt;I2SCLH&amp;nbsp;&amp;nbsp; = I2SCLH_SCLH;

&amp;nbsp; /* Install interrupt handler */
&amp;nbsp; NVIC_EnableIRQ(I2C0_IRQn);

&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_I2EN;
&amp;nbsp; return( TRUE );
}


uint32_t I2CEngine( void ) 
{
&amp;nbsp; I2CMasterState = I2C_IDLE;
&amp;nbsp; RdIndex = 0;
&amp;nbsp; WrIndex = 0;
&amp;nbsp; lcd_clear();
&amp;nbsp; if ( I2CStart() != TRUE )
&amp;nbsp; {
I2CStop();
return ( FALSE );
&amp;nbsp; } 

&amp;nbsp; while ( 1 )
&amp;nbsp; {
if ( I2CMasterState == DATA_NACK )
{
&amp;nbsp; I2CStop();
&amp;nbsp; break;
}
&amp;nbsp; }

&amp;nbsp; return ( TRUE );&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 
}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;i2c.h&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#ifndef __I2C_H 
#define __I2C_H

#define BUFSIZE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 64
#define MAX_TIMEOUT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00FFFFFF

#define I2CMASTER&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x01
#define I2CSLAVE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x02

#define AT24C08_ADDR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xA0

#define RD_BIT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x01

#define I2C_IDLE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0
#define I2C_STARTED&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1
#define I2C_RESTARTED&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2
#define I2C_REPEATED_START&amp;nbsp;&amp;nbsp;&amp;nbsp; 3
#define DATA_ACK&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 4
#define DATA_NACK&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 5
#define I2C_BUSY&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 6
#define I2C_NO_DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 7
#define I2C_NACK_ON_ADDRESS&amp;nbsp;&amp;nbsp; 8
#define I2C_NACK_ON_DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 9
#define I2C_ARBITRATION_LOST&amp;nbsp; 10
#define I2C_TIME_OUT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 11
#define I2C_OK&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 12

#define I2CONSET_I2EN&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;6)&amp;nbsp; /* I2C Control Set Register */
#define I2CONSET_AA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;2)
#define I2CONSET_SI&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;3)
#define I2CONSET_STO&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;4)
#define I2CONSET_STA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;5)

#define I2CONCLR_AAC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;2)&amp;nbsp; /* I2C Control clear Register */
#define I2CONCLR_SIC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;3)
#define I2CONCLR_STAC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;5)
#define I2CONCLR_I2ENC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;6)

#define I2DAT_I2C0x00000000&amp;nbsp; /* I2C Data Reg */
#define I2ADR_I2C0x00000000&amp;nbsp; /* I2C Slave Address Reg */
#define I2SCLH_SCLH0x00000080&amp;nbsp; /* I2C SCL Duty Cycle High Reg */
#define I2SCLL_SCLL0x00000080&amp;nbsp; /* I2C SCL Duty Cycle Low Reg */
#define I2SCLH_HS_SCLH0x00000008&amp;nbsp; /* Fast Plus I2C SCL Duty Cycle High Reg */
#define I2SCLL_HS_SCLL0x00000008&amp;nbsp; /* Fast Plus I2C SCL Duty Cycle Low Reg */

extern void I2C0_IRQHandler( void );
extern uint32_t I2CInit( uint32_t I2cMode );
extern uint32_t I2CStart( void );
extern uint32_t I2CStop( void );
extern uint32_t I2CEngine( void );

#endif /* end __I2C_H */
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 16 Jun 2016 01:46:02 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-16T01:46:02Z</dc:date>
    <item>
      <title>LPC1768 + AT24C08 - Timeout problem</title>
      <link>https://community.nxp.com/t5/LPCXpresso-IDE/LPC1768-AT24C08-Timeout-problem/m-p/541248#M7334</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mtgtech on Fri Jul 20 11:00:47 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hello, I am using a AT24C08 for store some datas and I'm having trouble. I am using code sample for I2C. The data is being written and read perfectly, but the function I2CStart() return always "timeout". This "problem" causes a delay in my routines of W/R. I believe it is necessary some modification in I2C0_IRQHandler() function. Someone could review my code?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I implemented a matricial keypad for tests of write and read.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;main.c&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
int main (void)
{
char temp[16];
unsigned char c = 0;
unsigned int i = 0;

SystemInit();
SysTick_Config(SystemFrequency/100);&amp;nbsp; /* Generate interrupt each 10 ms&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; */

if ( I2CInit( (uint32_t)I2CMASTER ) == FALSE )/* initialize I2c */
{
while ( 1 );/* Fatal error */
}

/* Initialize RTC with RTCCAL and RTCDIR values */
InitRTC();
/* start RTC */
StartRTC();

init_KEYPAD();
lcd_clear();

while(1)
{
c = get_KEYPAD();
if(c == '1')
{
for ( i = 0; i &amp;lt; BUFSIZE; i++ )/* clear buffer */
{
I2CMasterBuffer&lt;I&gt; = 0;
}

I2CWriteLength = 5;
I2CReadLength = 0;
I2CMasterBuffer[0] = AT24C08_ADDR;
I2CMasterBuffer[1] = 0x00;/* address offset for user seq. */

I2CMasterBuffer[2] = LPC_RTC-&amp;gt;HOUR;
I2CMasterBuffer[3] = LPC_RTC-&amp;gt;MIN;
I2CMasterBuffer[4] = LPC_RTC-&amp;gt;SEC;
I2CEngine();
}
if(c == '2')
{
for ( i = 0; i &amp;lt; BUFSIZE; i++ )
{
I2CSlaveBuffer&lt;I&gt; = 0x00;
}
/* Write SLA(W), address, SLA(R), and read one byte back. */
I2CWriteLength = 2;
I2CReadLength = 20;
I2CMasterBuffer[0] = AT24C08_ADDR;
I2CMasterBuffer[1] = 0x00;/* address */
I2CMasterBuffer[2] = AT24C08_ADDR | RD_BIT;
I2CEngine();

}
lcd_gotoxy(0,0);
sprintf(temp,"%d:%d:%d",I2CSlaveBuffer[0],I2CSlaveBuffer[1],I2CSlaveBuffer[2]);
lcd_print(temp);
}

return 0;
&lt;/I&gt;&lt;/I&gt;&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;i2c.c&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#include "lpc17xx.h"
#include "type.h"
#include "i2c.h"
#include "lcd.h"

volatile uint32_t I2CMasterState = I2C_IDLE;
volatile uint32_t I2CSlaveState = I2C_IDLE;

volatile uint32_t I2CCmd;
volatile uint32_t I2CMode;

volatile uint8_t I2CMasterBuffer[BUFSIZE];
volatile uint8_t I2CSlaveBuffer[BUFSIZE];
volatile uint32_t I2CCount = 0;
volatile uint32_t I2CReadLength;
volatile uint32_t I2CWriteLength;

volatile uint32_t RdIndex = 0;
volatile uint32_t WrIndex = 0;


void I2C0_IRQHandler(void)&amp;nbsp; 
{
&amp;nbsp; uint8_t StatValue;

&amp;nbsp; /* this handler deals with master read and master write only */
&amp;nbsp; StatValue = LPC_I2C0-&amp;gt;I2STAT;

switch ( StatValue )
&amp;nbsp; {
case 0x08:/* A Start condition is issued. */
WrIndex = 0;
LPC_I2C0-&amp;gt;I2DAT = I2CMasterBuffer[WrIndex++];
LPC_I2C0-&amp;gt;I2CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
break;

case 0x10:/* A repeated started is issued */
RdIndex = 0;
/* Send SLA with R bit set, */
LPC_I2C0-&amp;gt;I2DAT = I2CMasterBuffer[WrIndex++];
LPC_I2C0-&amp;gt;I2CONCLR = (I2CONCLR_SIC | I2CONCLR_STAC);
break;

case 0x18:/* Regardless, it's a ACK */
if ( I2CWriteLength == 1 )
{
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set Stop flag */
&amp;nbsp; I2CMasterState = I2C_NO_DATA;
}
else
{
&amp;nbsp; LPC_I2C0-&amp;gt;I2DAT = I2CMasterBuffer[WrIndex++];
}
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x28:/* Data byte has been transmitted, regardless ACK or NACK */
if ( WrIndex &amp;lt; I2CWriteLength )
{&amp;nbsp;&amp;nbsp; 
&amp;nbsp; LPC_I2C0-&amp;gt;I2DAT = I2CMasterBuffer[WrIndex++]; /* this should be the last one */
}
else
{
&amp;nbsp; if ( I2CReadLength != 0 )
&amp;nbsp; {
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STA;/* Set Repeated-start flag */
&amp;nbsp; }
&amp;nbsp; else
&amp;nbsp; {
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set Stop flag */
I2CMasterState = I2C_OK;
&amp;nbsp; }
}
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x30:
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set Stop flag */
I2CMasterState = I2C_NACK_ON_DATA;
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x40:/* Master Receive, SLA_R has been sent */
if ( (RdIndex + 1) &amp;lt; I2CReadLength )
{
&amp;nbsp; /* Will go to State 0x50 */
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_AA;/* assert ACK after data is received */
}
else
{
&amp;nbsp; /* Will go to State 0x58 */
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_AAC;/* assert NACK after data is received */
}
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x50:/* Data byte has been received, regardless following ACK or NACK */
I2CSlaveBuffer[RdIndex++] = LPC_I2C0-&amp;gt;I2DAT;
if ( (RdIndex + 1) &amp;lt; I2CReadLength )
{&amp;nbsp;&amp;nbsp; 
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_AA;/* assert ACK after data is received */
}
else
{
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_AAC;/* assert NACK on last byte */
}
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x58:
I2CSlaveBuffer[RdIndex++] = LPC_I2C0-&amp;gt;I2DAT;
I2CMasterState = I2C_OK;
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;/* Set Stop flag */ 
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;/* Clear SI flag */
break;

case 0x20:/* regardless, it's a NACK */
case 0x48:
LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; /* Set Stop flag */
I2CMasterState = I2C_NACK_ON_ADDRESS;
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;

case 0x38:/* Arbitration lost, in this example, we don't
deal with multiple master situation */
default:
I2CMasterState = I2C_ARBITRATION_LOST;
LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;
break;
&amp;nbsp; }
}

uint32_t I2CStart( void )
{
&amp;nbsp; uint32_t timeout = 0;
&amp;nbsp; uint32_t retVal = FALSE;
 
&amp;nbsp; /*--- Issue a start condition ---*/
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STA;/* Set Start flag */


&amp;nbsp;&amp;nbsp;&amp;nbsp; 
&amp;nbsp; /*--- Wait until START transmitted ---*/
&amp;nbsp; while( 1 )
&amp;nbsp; {
if ( I2CMasterState == I2C_STARTED )
{
&amp;nbsp; retVal = TRUE;
&amp;nbsp; break;
}
if ( timeout &amp;gt;= MAX_TIMEOUT )
{
&amp;nbsp; lcd_gotoxy(1,0);
lcd_print("MAX_TIMEOUT");
&amp;nbsp; retVal = FALSE;
&amp;nbsp; break;
}
timeout++;
&amp;nbsp; }
&amp;nbsp; return( retVal );
}


uint32_t I2CStop( void )
{
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_STO;&amp;nbsp; /* Set Stop flag */ 
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_SIC;&amp;nbsp; /* Clear SI flag */ 
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 
&amp;nbsp; /*--- Wait for STOP detected ---*/
&amp;nbsp; while( LPC_I2C0-&amp;gt;I2CONSET &amp;amp; I2CONSET_STO );
&amp;nbsp; return TRUE;
}


uint32_t I2CInit( uint32_t I2cMode ) 
{
&amp;nbsp; LPC_SC-&amp;gt;PCONP |= (1 &amp;lt;&amp;lt; 7);

&amp;nbsp; /* set PIO0.27 and PIO0.28 to I2C0 SDA and SCL */
&amp;nbsp; /* function to 01 on both SDA and SCL. */
&amp;nbsp; LPC_PINCON-&amp;gt;PINSEL1 &amp;amp;= ~((0x03&amp;lt;&amp;lt;22)|(0x03&amp;lt;&amp;lt;24));
&amp;nbsp; LPC_PINCON-&amp;gt;PINSEL1 |= ((0x01&amp;lt;&amp;lt;22)|(0x01&amp;lt;&amp;lt;24));
 
&amp;nbsp; /*--- Clear flags ---*/
&amp;nbsp; LPC_I2C0-&amp;gt;I2CONCLR = I2CONCLR_AAC | I2CONCLR_SIC | I2CONCLR_STAC | I2CONCLR_I2ENC;&amp;nbsp;&amp;nbsp;&amp;nbsp; 

&amp;nbsp; LPC_PINCON-&amp;gt;I2CPADCFG &amp;amp;= ~((0x1&amp;lt;&amp;lt;0)|(0x1&amp;lt;&amp;lt;2));
&amp;nbsp; LPC_I2C0-&amp;gt;I2SCLL&amp;nbsp;&amp;nbsp; = I2SCLL_SCLL;
&amp;nbsp; LPC_I2C0-&amp;gt;I2SCLH&amp;nbsp;&amp;nbsp; = I2SCLH_SCLH;

&amp;nbsp; /* Install interrupt handler */
&amp;nbsp; NVIC_EnableIRQ(I2C0_IRQn);

&amp;nbsp; LPC_I2C0-&amp;gt;I2CONSET = I2CONSET_I2EN;
&amp;nbsp; return( TRUE );
}


uint32_t I2CEngine( void ) 
{
&amp;nbsp; I2CMasterState = I2C_IDLE;
&amp;nbsp; RdIndex = 0;
&amp;nbsp; WrIndex = 0;
&amp;nbsp; lcd_clear();
&amp;nbsp; if ( I2CStart() != TRUE )
&amp;nbsp; {
I2CStop();
return ( FALSE );
&amp;nbsp; } 

&amp;nbsp; while ( 1 )
&amp;nbsp; {
if ( I2CMasterState == DATA_NACK )
{
&amp;nbsp; I2CStop();
&amp;nbsp; break;
}
&amp;nbsp; }

&amp;nbsp; return ( TRUE );&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 
}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;i2c.h&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#ifndef __I2C_H 
#define __I2C_H

#define BUFSIZE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 64
#define MAX_TIMEOUT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00FFFFFF

#define I2CMASTER&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x01
#define I2CSLAVE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x02

#define AT24C08_ADDR&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xA0

#define RD_BIT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x01

#define I2C_IDLE&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0
#define I2C_STARTED&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 1
#define I2C_RESTARTED&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2
#define I2C_REPEATED_START&amp;nbsp;&amp;nbsp;&amp;nbsp; 3
#define DATA_ACK&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 4
#define DATA_NACK&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 5
#define I2C_BUSY&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 6
#define I2C_NO_DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 7
#define I2C_NACK_ON_ADDRESS&amp;nbsp;&amp;nbsp; 8
#define I2C_NACK_ON_DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 9
#define I2C_ARBITRATION_LOST&amp;nbsp; 10
#define I2C_TIME_OUT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 11
#define I2C_OK&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 12

#define I2CONSET_I2EN&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;6)&amp;nbsp; /* I2C Control Set Register */
#define I2CONSET_AA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;2)
#define I2CONSET_SI&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;3)
#define I2CONSET_STO&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;4)
#define I2CONSET_STA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;5)

#define I2CONCLR_AAC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;2)&amp;nbsp; /* I2C Control clear Register */
#define I2CONCLR_SIC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;3)
#define I2CONCLR_STAC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;5)
#define I2CONCLR_I2ENC&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (0x1&amp;lt;&amp;lt;6)

#define I2DAT_I2C0x00000000&amp;nbsp; /* I2C Data Reg */
#define I2ADR_I2C0x00000000&amp;nbsp; /* I2C Slave Address Reg */
#define I2SCLH_SCLH0x00000080&amp;nbsp; /* I2C SCL Duty Cycle High Reg */
#define I2SCLL_SCLL0x00000080&amp;nbsp; /* I2C SCL Duty Cycle Low Reg */
#define I2SCLH_HS_SCLH0x00000008&amp;nbsp; /* Fast Plus I2C SCL Duty Cycle High Reg */
#define I2SCLL_HS_SCLL0x00000008&amp;nbsp; /* Fast Plus I2C SCL Duty Cycle Low Reg */

extern void I2C0_IRQHandler( void );
extern uint32_t I2CInit( uint32_t I2cMode );
extern uint32_t I2CStart( void );
extern uint32_t I2CStop( void );
extern uint32_t I2CEngine( void );

#endif /* end __I2C_H */
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jun 2016 01:46:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPCXpresso-IDE/LPC1768-AT24C08-Timeout-problem/m-p/541248#M7334</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-16T01:46:02Z</dc:date>
    </item>
  </channel>
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